- 04 5月, 2018 1 次提交
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由 Graeme Smecher 提交于
The missing "compatible" entries are needed by drivers/clk/ti/clkctrl.c, and without them the structures initialized in drivers/clk/ti/clk-814x.c are not passed to configuration code. The result is a "not found from clkctrl data" error message, although boot proceeds anyway. The reason why the compatible is not found is because the board specific files override the SoC compatible without including it. This did not cause any issues until with the clkctrl nodes got introduced. Very lightly tested on a (lurching) AM3874 design that's in the middle of a kernel upgrade from TI's abandoned 2.6.37 tree. Also tested on j5eco-evm and hp-t410 to verify the clkctrl clocks are found. Fixes: bb30465b ("ARM: dts: dm814x: add clkctrl nodes") Fixes: 80a06c0d ("ARM: dts: dm816x: add clkctrl nodes") Signed-off-by: NGraeme Smecher <gsmecher@threespeedlogic.com> [tony: updated to fix for 8168-evm, updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 31 8月, 2016 1 次提交
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由 Javier Martinez Canillas 提交于
This patch fixes the following DTC warnings: "Node /memory has a reg or ranges property, but no unit name" Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 8月, 2016 1 次提交
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由 Javier Martinez Canillas 提交于
This patch fixes the following DTC warnings for many boards: "Node /fixedregulator@0 has a unit name, but no reg property" Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 5月, 2016 1 次提交
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由 Nicolas Chauvet 提交于
This patch disable mmc nodes by default in the dm814x.dtsi and enable only when needed on a given dts v2: Disable un-used mmc nodes on the related boards dts files instead of from the included SOC dts Signed-off-by: NNicolas Chauvet <kwizart@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 3月, 2016 2 次提交
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由 Roger Quadros 提交于
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and can't be used for wait state insertion for NAND I/O read/write. So disable read/write wait monitoring as per Reference Manual's suggestion [1]. [1] dm814x TRM: SPRUGZ8F: 11.2.4.12.2 NAND Device-Ready Pin Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 2月, 2016 1 次提交
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由 Tony Lindgren 提交于
Add NAND support for dm8148-evm. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 12月, 2015 2 次提交
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由 Tony Lindgren 提交于
Add usb support for dm814x-evm Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
There is a mmc slot on the dm8148-evm that's wired to the sd_1 interface. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 9月, 2015 1 次提交
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由 Tony Lindgren 提交于
Looks like I made a typo on the control base, all the 81xx SoCs have it at 0x48140000 base. We've just gotten away with the typo as the Ethernet phy was configured by the bootloader on my test system and we're not yet using the pinctrl. In addition to fixing the contol base, we need to also use the right Ethernet phy flags to initialize it. And we are still missing the PLL driver for dm814x and only relying on the divider and mux clocks. Fixes: f3d953ea ("ARM: dts: Add minimal dm814x support") Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 7月, 2015 1 次提交
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由 Tony Lindgren 提交于
Add minimal dts support for dm8148-evm. Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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