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  1. 03 3月, 2010 1 次提交
  3. 28 12月, 2009 2 次提交
  5. 16 12月, 2009 1 次提交
  7. 27 8月, 2009 1 次提交
    • P
      avr32: function for independently setting up SPI slaves · 07084203
      由 Peter Ma 提交于 
      at32ap_spi_setup_slaves() is exposed to allow the addition of SPI slaves
to a SPI bus that has already been registered.  This is especially
useful for add-on cards, which have their own board setup function.
at32ap_spi_add_device() has been slightly re-organized, but should be
transparent to existing users.

So to add a SPI slave, after a SPI bus has already been registered:

	/* Configure the list of slaves on SPI controller "id" */
	at32_spi_setup_slaves(id,spi_board_info,ARRAY_SIZE(spi_board_info));
 	/* Register the list of slaves */
 	spi_register_board_info(spi_board_info,ARRAY_SIZE(spi_board_info));
Signed-off-by: NPeter Ma <pma@mediamatech.com>
[haavard.skinnemoen@atmel.com: trivial whitespace fix]
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      07084203
  9. 07 4月, 2009 1 次提交
  11. 01 4月, 2009 1 次提交
  13. 27 3月, 2009 2 次提交
  15. 26 3月, 2009 1 次提交
  17. 07 1月, 2009 1 次提交
  19. 05 1月, 2009 2 次提交
  21. 24 10月, 2008 1 次提交
  23. 23 10月, 2008 2 次提交
  25. 13 10月, 2008 1 次提交
  27. 12 10月, 2008 1 次提交
  29. 06 10月, 2008 3 次提交
    • H
      atmel-mci: Add experimental DMA support · 65e8b083
      由 Haavard Skinnemoen 提交于 
      This adds support for DMA transfers through the generic DMA engine
framework with the DMA slave extensions.

The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 7.5 MiB/s on fast cards with debugging disabled.

Unfortunately, the driver has been known to lock up from time to time
with DMA enabled, so DMA support is currently optional and marked
EXPERIMENTAL. However, I didn't see any problems while testing 13
different cards (MMC, SD and SDHC of different brands and sizes), so I
suspect the "Initialize BLKR before sending data transfer command" fix
that was posted earlier fixed this as well.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      65e8b083
    • H
      atmel-mci: Platform code for supporting multiple mmc slots · 6b918657
      由 Haavard Skinnemoen 提交于 
      Add the necessary platform infrastructure to support multiple mmc/sdcard
slots all at once through a single controller. Currently, the driver
will use the first valid slot it finds and stick with that, but later
patches will add support for switching between several slots on the fly.

Extend the platform data structure with per-slot information: MMC/SDcard
bus width and card detect/write protect pins. This will affect the pin
muxing as well as the capabilities announced to the mmc core.

Note that board code is now required to supply a mci_platform_data
struct to at32_add_device_mci().
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      6b918657
    • A
      avr32: Replace static clock list with dynamic linked list · 300bb762
      由 Alex Raimondi 提交于 
      This replaces the at32_clock_list array with a linked list.
Clocks can now be registered (added) to the list.
Signed-off-by: NAlex Raimondi <raimondi@miromico.ch>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      300bb762
  31. 22 9月, 2008 1 次提交
  33. 08 8月, 2008 1 次提交
  35. 05 8月, 2008 1 次提交
  37. 27 7月, 2008 1 次提交
    • D
      avr32: some mmc/sd cleanups · 3c26e170
      由 David Brownell 提交于 
      Minor cleanups for the MMC/SD support on avr32:

 - Make at32_add_device_mci() properly initialize "missing"
   platform data ... so boards like STK1002 won't try GPIO 0.

 - Switch over to gpio_is_valid() instead of testing for only
   one designated value.

 - Provide STK1002 platform data for the unlikely case that
   switches are set so first Ethernet controller isn't in use.
   (That's the only way to get card detect and writeprotect
   switch sensing on the STK1000.)

And get rid of one "unused variable" warning.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      3c26e170
  39. 24 7月, 2008 1 次提交
  41. 18 7月, 2008 1 次提交
    • B
      avr32: clean up mci platform code · fbfca4b8
      由 Ben Nizette 提交于 
      This patch does a few small cleanups around the atmel mci platform code
and in the atmel-mci driver.  The platform changes simply removes an
unused variable, uses the fact that by the end we always have some form
of platform data and notes that GPIO_PIN_NONE != 0.  This last point
could cause the incorrect attempt to twice reserve pin PA0.

While we've got the hood up, add linux/err.h to the atmel-mci.c include
list.  It needs it and generally pulls it by voodoo but I did once
stumble across a config which don't build.

This is against Linus' latest git.
Signed-off-by: NBen Nizette <bn@niasdigital.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      fbfca4b8
  43. 15 7月, 2008 1 次提交
    • H
      atmel-mci: Driver for Atmel on-chip MMC controllers · 7d2be074
      由 Haavard Skinnemoen 提交于 
      This is a driver for the MMC controller on the AP7000 chips from
Atmel. It should in theory work on AT91 systems too with some
tweaking, but since the DMA interface is quite different, it's not
entirely clear if it's worth merging this with the at91_mci driver.

This driver has been around for a while in BSPs and kernel sources
provided by Atmel, but this particular version uses the generic DMA
Engine framework (with the slave extensions) instead of an
avr32-only DMA controller framework.

This driver can also use PIO transfers when no DMA channels are
available, and for transfers where using DMA may be difficult or
impractical for some reason (e.g. the DMA setup overhead is usually
not worth it for very short transfers, and badly aligned buffers or
lengths are difficult to handle.)

Currently, the driver only support PIO transfers. DMA support has been
split out to a separate patch to hopefully make it easier to review.

The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 3.5 MiB/s on fast cards with debugging disabled.

The driver has also been tested using the mmc_test module on the same
cards. All tests except 7, 9, 15 and 17 succeed. The first two are
unsupported by all the cards I have, so I don't know if the driver
handles this correctly. The last two fail because the hardware flags a
Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
with that.

Documentation for this controller can be found in many data sheets from
Atmel, including the AT32AP7000 data sheet which can be found here:

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
      7d2be074
  45. 09 7月, 2008 1 次提交
    • H
      dmaengine: Driver for the Synopsys DesignWare DMA controller · 3bfb1d20
      由 Haavard Skinnemoen 提交于 
      This adds a driver for the Synopsys DesignWare DMA controller (aka
DMACA on AVR32 systems.) This DMA controller can be found integrated
on the AT32AP7000 chip and is primarily meant for peripheral DMA
transfer, but can also be used for memory-to-memory transfers.

This patch is based on a driver from David Brownell which was based on
an older version of the DMA Engine framework. It also implements the
proposed extensions to the DMA Engine API for slave DMA operations.

The dmatest client shows no problems, but there may still be room for
improvement performance-wise. DMA slave transfer performance is
definitely "good enough"; reading 100 MiB from an SD card running at ~20
MHz yields ~7.2 MiB/s average transfer rate.

Full documentation for this controller can be found in the Synopsys
DW AHB DMAC Databook:

http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf

The controller has lots of implementation options, so it's usually a
good idea to check the data sheet of the chip it's intergrated on as
well. The AT32AP7000 data sheet can be found here:

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682


Changes since v4:
  * Use client_count instead of dma_chan_is_in_use()
  * Add missing include
  * Unmap buffers unless client told us not to

Changes since v3:
  * Update to latest DMA engine and DMA slave APIs
  * Embed the hw descriptor into the sw descriptor
  * Clean up and update MODULE_DESCRIPTION, copyright date, etc.

Changes since v2:
  * Dequeue all pending transfers in terminate_all()
  * Rename dw_dmac.h -> dw_dmac_regs.h
  * Define and use controller-specific dma_slave data
  * Fix up a few outdated comments
  * Define hardware registers as structs (doesn't generate better
    code, unfortunately, but it looks nicer.)
  * Get number of channels from platform_data instead of hardcoding it
    based on CONFIG_WHATEVER_CPU.
  * Give slave clients exclusive access to the channel

Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>,
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      3bfb1d20
  47. 02 7月, 2008 2 次提交
  49. 28 6月, 2008 1 次提交
  51. 27 6月, 2008 5 次提交
  53. 07 6月, 2008 1 次提交
  55. 20 4月, 2008 2 次提交
    • H
      avr32: Implement set_rate(), set_parent() and mode() for pll1 · 35bf50cc
      由 Hans-Christian Egtvedt 提交于 
      This patch is a take two of adding full functionality to PLL1 on
AT32AP7000.  This allows board-specific code and drivers to configure
and enable PLL1. This is useful when precise control over the
frequency of e.g. a genclock is needed and requested by users for the
ABDAC device.

The patch is based upon previous patches from both Haavard Skinnemoen
and David Brownell.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      35bf50cc
    • D
      avr32: Generic clockevents support · e723ff66
      由 David Brownell 提交于 
      This combines three patches from David Brownell:
  * avr32: tclib support
  * avr32: simplify clocksources
  * avr32: Turn count/compare into a oneshot clockevent device

Register both TC blocks (instead of just the first one) so that
the AT32/AT91 tclib code will pick them up (instead of just the
avr32-only PIT-style clocksource).

Rename the first one and its resources appropriately.

More cleanups to the cycle counter clocksource code

 - Disable all the weak symbol magic; remove the AVR32-only TCB-based
   clocksource code (source and header).

 - Mark the __init code properly.

 - Don't forget to report IRQF_TIMER.

 - Make the system work properly with this clocksource, by preventing
   use of the CPU "idle" sleep state in the idle loop when it's used.

Package the avr32 count/compare timekeeping support as a oneshot
clockevent device, so it supports NO_HZ and high res timers.
This means it also supports plugging in other clockevent devices
and clocksources.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      e723ff66