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  1. 04 7月, 2006 1 次提交
    • S
      kbuild: introduce utsrelease.h · 63104eec
      由 Sam Ravnborg 提交于 
      include/linux/version.h contained both actual KERNEL version
and UTS_RELEASE that contains a subset from git SHA1 for when
kernel was compiled as part of a git repository.
This had the unfortunate side-effect that all files including version.h
would be recompiled when some git changes was made due to changes SHA1.
Split it out so we keep independent parts in separate files.

Also update checkversion.pl script to no longer check for UTS_RELEASE.
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      63104eec
  3. 03 7月, 2006 1 次提交
  5. 01 7月, 2006 1 次提交
  7. 30 6月, 2006 2 次提交
    • I
      [PATCH] genirq: cleanup: merge irq_affinity[] into irq_desc[] · a53da52f
      由 Ingo Molnar 提交于 
      Consolidation: remove the irq_affinity[NR_IRQS] array and move it into the
irq_desc[NR_IRQS].affinity field.

[akpm@osdl.org: sparc64 build fix]
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      a53da52f
    • I
      [PATCH] genirq: rename desc->handler to desc->chip · d1bef4ed
      由 Ingo Molnar 提交于 
      This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.

While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.

The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.

This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.

As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.

The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.

We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.

This patch:

rename desc->handler to desc->chip.

Originally i did not want to do this, because it's a big patch.  But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.

I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.

So lets get over with this quickly.  The conversion was done automatically
via scripts and converts all the code in the kernel.

This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.

[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      d1bef4ed
  9. 22 6月, 2006 1 次提交
  11. 26 5月, 2006 1 次提交
  13. 28 4月, 2006 2 次提交
  15. 14 4月, 2006 1 次提交
  17. 28 3月, 2006 1 次提交
    • P
      ppc: Remove CHRP, POWER3 and POWER4 support from arch/ppc · 0a26b136
      由 Paul Mackerras 提交于 
      32-bit CHRP machines are now supported only in arch/powerpc, as are
all 64-bit PowerPC processors.  This means that we don't use
Open Firmware on any platform in arch/ppc any more.

This makes PReP support a single-platform option like every other
platform support option in arch/ppc now, thus CONFIG_PPC_MULTIPLATFORM
is gone from arch/ppc.  CONFIG_PPC_PREP is the option that selects
PReP support and is generally what has replaced
CONFIG_PPC_MULTIPLATFORM within arch/ppc.

_machine is all but dead now, being #defined to 0.

Updated Makefiles, comments and Kconfig options generally to reflect
these changes.
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      0a26b136
  19. 27 3月, 2006 2 次提交
  21. 24 3月, 2006 1 次提交
  23. 17 3月, 2006 1 次提交
  25. 10 2月, 2006 2 次提交
  27. 08 2月, 2006 1 次提交
  29. 07 2月, 2006 4 次提交
  31. 05 2月, 2006 1 次提交
  33. 28 1月, 2006 1 次提交
  35. 20 1月, 2006 2 次提交
  37. 15 1月, 2006 1 次提交
    • P
      [PATCH] ppc: Remove powermac support from ARCH=ppc · a7fdd90b
      由 Paul Mackerras 提交于 
      This makes it possible to build kernels for PReP and/or CHRP
with ARCH=ppc by removing the (non-building) powermac support.
It's now also possible to select PReP and CHRP independently.
Powermac users should now build with ARCH=powerpc instead of
ARCH=ppc.  (This does mean that it is no longer possible to
build a 32-bit kernel for a G5.)
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a7fdd90b
  39. 14 1月, 2006 1 次提交
  41. 13 1月, 2006 1 次提交
  43. 09 1月, 2006 2 次提交
    • M
      [PATCH] ppc32: m8xx watchdog update · fb64c244
      由 Marcelo Tosatti 提交于 
      This updates m8xx_wdt as follows:

1) Remove now obsolete fpos check in the write() function. The driver is
currently non functional due to this bug.

2) Use in/out macros for register access.

3) Allows m8xx_wdt to use a kernel timer instead of the builtin RTC/PIT
for keep-alive trigger (which is responsible for servicing the watchdog
until an userspace application takes over). For instance Cyclades PRxK
boards (MPC 855T based) have a non-functional internal RTC/PIT unit.
Behaviour for boards with RTC/PIT is unchaged.

4) The last change required moving the RTCSC register setting code
to a weak function which can be overriden by board specific files.
Otherwise the timer init code trashes the register making it impossible
for m8xx_wdt to detect the situation.
Signed-off-by: NMarcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      fb64c244
    • K
      [PATCH] powerpc: moved ipic code to arch/powerpc · 1cd8e506
      由 Kumar Gala 提交于 
      Moved 83xx and QUICC Engine interrupt handling code into arch/powerpc
as a precursor of getting 83xx sub-arch building in arch/powerpc.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1cd8e506
  45. 07 1月, 2006 4 次提交
  47. 17 12月, 2005 1 次提交
  49. 02 12月, 2005 1 次提交
  51. 18 11月, 2005 1 次提交
  53. 14 11月, 2005 1 次提交
  55. 11 11月, 2005 1 次提交