- 19 12月, 2013 2 次提交
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由 Laurent Pinchart 提交于
The external crystal frequency is 20MHz on the Lager board. Specify it in the device tree. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
Copy the device nodes from Lager reference into the Lager device tree file. This will allow us to use a single DTS file regarless of kernel configuration. In case of legacy C board code the device nodes may or may not be used, but in the multiplatform case all the DT device nodes are used. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 10 12月, 2013 2 次提交
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由 Magnus Damm 提交于
Add 2GiB of DRAM at 0x1_8000_0000 to support the full 4GiB of Lager system memory. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
In order to allow usage of the preprocessor in the SoC device tree sources, switch from /include/ to #include. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 06 8月, 2013 1 次提交
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由 Simon Horman 提交于
Now that Ether support has been added to the lager board it is possible to use nfsroot. This configuration is in line with that of other shmobile boards. Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 05 8月, 2013 1 次提交
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由 Laurent Pinchart 提交于
The shmobile DT files available in the kernel are reference implementations intended to be used as sample code, as well as for development. As such, it makes sense to mount the root file system in read/write mode by default. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 03 4月, 2013 1 次提交
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由 Magnus Damm 提交于
Lager base board support making use of 2 GiB of memory, the r8a7790 SoC with the SCIF0 serial port and CA15 with ARM architected timer. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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