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  1. 17 7月, 2016 1 次提交
  3. 16 7月, 2016 9 次提交
  5. 14 7月, 2016 1 次提交
    • T
      dt-bindings: display: tegra: Add source clock for SOR · 5d2304c1
      由 Thierry Reding 提交于 
      The SOR clock can have various sources, with the most commonly used
being the sor_safe, pll_d2_out0, pll_dp and sor_brick clocks. These
are configured using a three level mux, of which the first 2 levels
can be treated as one. The direct parents of the SOR clock are the
sor_safe, sor_brick and sor_src clocks, whereas the pll_d2_out0 and
pll_dp clocks can be selected as parents of the sor_src clock via a
second mux.

Previous generations of Tegra have only supported eDP and LVDS with
the SOR, where LVDS was never used on publicly available hardware.
Clocking for this only ever required the first level mux (to select
between sor_safe and sor_brick).

Tegra210 has a new revision of the SOR that supports HDMI and hence
needs to support the second level mux to allow selecting pll_d2_out0
as the SOR clock's parent. This second mux is knows as sor_src, and
operating system software needs a reference to it in order to select
the proper parent.
Signed-off-by: NThierry Reding <treding@nvidia.com>
      5d2304c1
  7. 13 7月, 2016 1 次提交
  9. 11 7月, 2016 7 次提交
  11. 05 7月, 2016 3 次提交
  13. 30 6月, 2016 2 次提交
    • J
      dt-bindings: Add bindings for Tegra DPAUX pinctrl driver · 6cb68e46
      由 Jon Hunter 提交于 
      On Tegra124, Tegra132 and Tegra210 devices the pads used by the Display
Port Auxiliary (DPAUX) channel are multiplexed such that they can also
be used by one of the internal I2C controllers. Note that this is
different from I2C-over-AUX supported by the DPAUX controller. The
register that configures these pads is part of the DPAUX controllers
register set and so a pinctrl driver is being added for the DPAUX device
to share these pads. Add the device-tree binding documentation for the
DPAUX pad controller.

Although there is only one group of pads associated with the DPAUX that
can be multiplexed, the group still needs to be described by the binding.
If the 'groups' property is not present in the binding, then the pads
will not be allocated by the pinctrl core for a client and this would
allow another client to re-configure the same pads that may already be
in-use.

Please note that although the "off" function for the DPAUX pads is not
technically a pin-mux setting but more of a pin-conf setting it is
simpler to expose these as a function so that the user can simply select
either "aux", "i2c" or "off" as the current function/mode.

Update the main DPAUX binding documentation to reference the DPAUX pad
controller binding document and add the 'i2c-bus' subnode. The 'i2c-bus'
subnode is used for populating I2C slaves for the DPAUX device so that
the I2C driver core does not attempt to add the DPAUX pad controller
nodes as I2C slaves.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>
      6cb68e46
    • J
      dt-bindings: display: Update Tegra DPAUX documentation · caf8a6c4
      由 Jon Hunter 提交于 
      Update the DPAUX compatibility string information for Tegra124, Tegra132
and Tegra210.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NThierry Reding <treding@nvidia.com>
      caf8a6c4
  15. 20 6月, 2016 1 次提交
  17. 17 6月, 2016 2 次提交
  19. 16 6月, 2016 1 次提交
  21. 15 6月, 2016 1 次提交
  23. 13 6月, 2016 1 次提交
  25. 10 6月, 2016 1 次提交
  27. 08 6月, 2016 2 次提交
  29. 07 6月, 2016 1 次提交
  31. 06 6月, 2016 1 次提交
  33. 03 6月, 2016 3 次提交
  35. 30 5月, 2016 1 次提交
  37. 28 5月, 2016 1 次提交
    • A
      MIPS: devicetree: fix cpu interrupt controller node-names · 5214cae7
      由 Antony Pavlov 提交于 
      Here is the quote from [1]:

    The unit-address must match the first address specified
    in the reg property of the node. If the node has no reg property,
    the @ and unit-address must be omitted and the node-name alone
    differentiates the node from other nodes at the same level

This patch adjusts MIPS dts-files and devicetree binding
documentation in accordance with [1].

    [1] Power.org(tm) Standard for Embedded Power Architecture(tm)
        Platform Requirements (ePAPR). Version 1.1 – 08 April 2011.
        Chapter 2.2.1.1 Node Name Requirements
Signed-off-by: NAntony Pavlov <antonynpavlov@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13345/Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      5214cae7