- 24 3月, 2017 3 次提交
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由 Neil Armstrong 提交于
Prepend the compatible strings with a GX generic name in nodes compatible with the GXBB HW and keep the same scheme as other nodes. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Since we know the GXBB and GXL/GXM share more hardware, we can safely move the remaining peripheral nodes present in the GXBB dtsi to the common GX dtsi. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 07 3月, 2017 1 次提交
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由 Martin Blumenstingl 提交于
The ethmac node has to be configured for each board due to different pinctrl nodes for RGMII/RMII. Thus the phy-mode should be specified at the same place (= in the board .dts), making it easier to read the board .dts file (because the phy-mode is stated explicitly, without requiring developers to read all "parent" .dtsi as well). Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 31 1月, 2017 1 次提交
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由 Martin Blumenstingl 提交于
Add the SAR ADC to meson-gxbb.dtsi and meson-gxl.dtsi. GXBB provides a 10-bit ADC while GXL and GXM provide a 12-bit ADC. Some boards use resistor ladder buttons connected through one of the ADC channels. On newer devices (GXL and GXM) some boards use pull-ups/downs to change the resistance (and thus the ADC value) on one of the ADC channels to indicate the board revision. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 28 1月, 2017 1 次提交
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由 Martin Blumenstingl 提交于
All Meson GX SoCs (GXBB, GXL and GXM) have a PWM controller within the AO domain. When one of the board's LEDs is connected to one of the AO PWM pins then this can be used to dim that LED (when the leds-pwm driver is used). Add the pwm_AO_ab to allow such devices to use the leds-pwm driver. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 27 1月, 2017 1 次提交
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由 Neil Armstrong 提交于
The Amlogic Meson GXBB/GXL/GXM secure monitor uses part of the memory space, this patch adds these reserved zones. Without such reserved memory zones, running the following stress command : $ stress-ng --vm 16 --vm-bytes 128M --timeout 10s multiple times: Could lead to the following kernel crashes : [ 46.937975] Bad mode in Error handler detected on CPU1, code 0xbf000000 -- SError ... [ 47.058536] Internal error: Attempting to execute userspace memory: 8600000f [#3] PREEMPT SMP ... Instead of the OOM killer. Fixes: 4f24eda8 ("ARM64: dts: Prepare configs for Amlogic Meson GXBaby") Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> [khilman: added Fixes tag, added _reserved and unit addresses] Signed-off-by: NKevin Hilman <khilman@baylibre.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 19 1月, 2017 1 次提交
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由 Martin Blumenstingl 提交于
This adds the missing node for the uart_AO_B port to the meson-gx.dtsi (as this is supported by GXBB, GXL and GXM) along with the required pinctrl pins. This is required as some boards are using it (the boards from the Khadas VIM series for example have it exposed on the pin headers). Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 11 1月, 2017 1 次提交
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由 Martin Blumenstingl 提交于
SCPI and SRAM are identical on GXBB and GXL. Moving the corresponding nodes to meson-gx adds support for the thermal sensor on GXL based devices. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NNeil Armstrong <narmstrong@baylibre.com> [khilman: add scpi_clocks label] Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 04 1月, 2017 1 次提交
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由 Neil Armstrong 提交于
Add Video Processing Unit and CVBS Output nodes, and enable CVBS on selected boards. Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 16 11月, 2016 2 次提交
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由 Andreas Färber 提交于
meson-gx.dtsi was directly derived from meson-gxbb.dtsi, so keep the copyrights in chronological order to not give a wrong impression. Fixes: c328666d ("ARM64: dts: amlogic: Add Meson GX dtsi from GXBB") Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Kevin Hilman <khilman@baylibre.com> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Move common nodes between GXBB and GXL in to the common GX dtsi. Leave the clock attributes in the GXBB dtsi for now. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 21 10月, 2016 1 次提交
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由 Kevin Hilman 提交于
Add binding and basic support for the SD/eMMC controller on Amlogic S905/GXBB devices. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NKevin Hilman <khilman@baylibre.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> [narmstrong: added nodes for GX, enabled SDIO on P20x] Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 19 10月, 2016 1 次提交
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由 Neil Armstrong 提交于
In order to remove the boot warning : [ 2.290933] Unable to detect cache hierarchy from DT for CPU 0 And add missing L2 cache hierarchy information, add a simple l2 cache node and reference it from the A53 cpu nodes. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 18 10月, 2016 1 次提交
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由 Neil Armstrong 提交于
Move all non-gxbb specific nodes to a common GX dtsi. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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