- 23 4月, 2013 1 次提交
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由 Varun Sethi 提交于
The swap_pci_ref function is used by the IOMMU API code for swapping pci device pointers, while determining the iommu group for the device. Currently this function was being implemented for different IOMMU drivers. This patch moves the function to a new file, drivers/iommu/pci.h so that the implementation can be shared across various IOMMU drivers. Signed-off-by: NVarun Sethi <Varun.Sethi@freescale.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 27 3月, 2013 1 次提交
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由 Joerg Roedel 提交于
There is a bug introduced with commit 27c2127a that causes devices which are hot unplugged and then hot-replugged to not have per-device dma_ops set. This causes these devices to not function correctly. Fixed with this patch. Cc: stable@vger.kernel.org Reported-by: NAndreas Degert <andreas.degert@googlemail.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 26 3月, 2013 1 次提交
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由 Wei Yongjun 提交于
Remove duplicated include. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 10 3月, 2013 2 次提交
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由 Arnd Bergmann 提交于
The OMAP IOMMU driver intentionally fails to build on OMAP1 platforms, so we should not allow enabling it there. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Joerg Roedel <joro@8bytes.org> Cc: iommu@lists.linux-foundation.org Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Omar Ramirez Luna <omar.luna@linaro.org> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Nikola Pajkovsky 提交于
commit 318fe782 ("IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround") added amd_iommu_erratum_746_workaround and it's marked as __init, which is wrong WARNING: drivers/iommu/built-in.o(.text+0x639c): Section mismatch in reference from the function iommu_init_pci() to the function .init.text:amd_iommu_erratum_746_workaround() The function iommu_init_pci() references the function __init amd_iommu_erratum_746_workaround(). This is often because iommu_init_pci lacks a __init annotation or the annotation of amd_iommu_erratum_746_workaround is wrong. Signed-off-by: NNikola Pajkovsky <npajkovs@redhat.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 06 3月, 2013 1 次提交
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由 Li, Zhen-Hua 提交于
The number of DMA fault reasons in intel's document are from 1 to 0xD, but in dmar.c fault reason 0xD is not printed out. In this document: "Intel Virtualization Technology for Directed I/O Architecture Specification" http://download.intel.com/technology/computing/vptech/Intel(r)_VT_for_Direct_IO.pdf Chapter 4. Support For Device-IOTLBs Table 6. Unsuccessful Translated Requests There is fault reason for 0xD not listed in kernel: Present context-entry used to process translation request specifies blocking of Translation Requests (Translation Type (T) field value not equal to 01b). This patch adds reason 0xD as well. Signed-off-by: NLi, Zhen-Hua <zhen-hual@hp.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Donald Dutile <ddutile@redhat.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Hannes Reinecke <hare@suse.de> Link: http://lkml.kernel.org/r/1362537797-6034-1-git-send-email-zhen-hual@hp.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 26 2月, 2013 1 次提交
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 23 2月, 2013 1 次提交
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 20 2月, 2013 1 次提交
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由 Daniel Vetter 提交于
We already have the quirk entry for the mobile platform, but also reports on some desktop versions. So be paranoid and set it everywhere. References: http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg33138.html Cc: stable@vger.kernel.org Cc: David Woodhouse <dwmw2@infradead.org> Cc: "Sankaran, Rajesh" <rajesh.sankaran@intel.com> Reported-and-tested-by: NMihai Moldovan <ionic@ionic.de> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 19 2月, 2013 2 次提交
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由 Stephen Warren 提交于
Tegra only supports, and always enables, device tree. Remove all ifdefs for DT support from the driver. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Stephen Warren 提交于
Tegra only supports, and always enables, device tree. Remove all ifdefs for DT support from the driver. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 13 2月, 2013 1 次提交
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由 Cyril Roelandt 提交于
dma_ops_domain_free on a NULL pointer is a no-op, so the NULL check in amd_iommu_init_dma_ops() can be removed. Signed-off-by: NCyril Roelandt <tipecaml@gmail.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 08 2月, 2013 4 次提交
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由 Joerg Roedel 提交于
When dma_ops are initialized the unity mappings are created. The init_device_table_dma() function makes sure DMA from all devices is blocked by default. This opens a short window in time where DMA to unity mapped regions is blocked by the IOMMU. Make sure this does not happen by initializing the device table after dma_ops. Cc: stable@vger.kernel.org Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Hannes Reinecke 提交于
kmemcheck complained about the use of uninitialized memory. Fix by using kzalloc instead of kmalloc. Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: NHannes Reinecke <hare@suse.de> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Hiroshi Doyu 提交于
This fixes kernel crash because of BUG() in register address validation. Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Sachin Kamat 提交于
'exynos_sysmmu_disable' is used only in this file and can be made static. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 06 2月, 2013 5 次提交
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由 Hideki EIRAKU 提交于
This is the Renesas IPMMU driver and IOMMU API implementation. The IPMMU module supports the MMU function and the PMB function. The MMU function provides address translation by pagetable compatible with ARMv6. The PMB function provides address translation including tile-linear translation. This patch implements the MMU function. The iommu driver does not register a platform driver directly because: - the register space of the MMU function and the PMB function have a common register (used for settings flush), so they should ideally have a way to appropriately share this register. - the MMU function uses the IOMMU API while the PMB function does not. - the two functions may be used independently. Signed-off-by: NHideki EIRAKU <hdk@igel.co.jp> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
This attribute can be used to set and get the number of subwindows on IOMMUs that are window-based. Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
Add the iommu_domain_window_enable() and iommu_domain_window_disable() functions to the IOMMU-API. These functions will be used to setup domains that are based on subwindows and not on paging. Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
This attribute of a domain can be queried to find out if the domain supports setting up page-tables using the iommu_map() and iommu_unmap() functions. Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
In case the page-size bitmap is zero the code path in iommu_map and iommu_unmap is undefined. Make it defined and return -ENODEV in this case. Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 05 2月, 2013 3 次提交
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由 Hiroshi Doyu 提交于
Theoretically TEGRA_IOMMU_SMMU depends on ARCH_TEGRA_3x_SOC and ARCH_TEGRA_114_SOC only. This patch allows a Tegra20 only kernel to enable SMMU(Tegra20 doesn't have a SMMU), which could avoid editing this Kconfig entry every time we add a new chip later. Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
Do not repeat the checking loop in the read and write functions. Use a single helper function for that check and call it in both accessors. Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Hiroshi Doyu 提交于
Presently SMMU registers are located in discontiguous 3 blocks. They are interleaved by MC registers. Ideally SMMU register blocks should be in an independent one block, but it is too late to change this H/W design. In the future Tegra chips over some generations, it is expected that some of register block "size" can be extended towards the end and also more new register blocks will be added at most a few blocks. The starting address of each existing block won't change. This patch allocates multiple number of register blocks dynamically based on the info passed from DT. Those ranges are verified in the accessors{read,write}. This may sacrifice some performance because a new accessors prevents compiler optimization of a fixed size register offset calculation. Since SMMU register accesses are not so frequent, this would be acceptable. This patch is necessary to unify "tegra-smmu.ko" over some Tegra SoC generations. Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 04 2月, 2013 1 次提交
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由 Sami Liedes 提交于
Fix tegra_smmu_probe() to initialize client_lock spinlocks in per-address-space structures. Signed-off-by: NSami Liedes <sliedes@nvidia.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 03 2月, 2013 1 次提交
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由 Andy Lutomirski 提交于
Current kernels print this on my Dell server: ------------[ cut here ]------------ WARNING: at drivers/iommu/intel_irq_remapping.c:542 intel_enable_irq_remapping+0x7b/0x27e() Hardware name: PowerEdge R620 Your BIOS is broken and requested that x2apic be disabled This will leave your machine vulnerable to irq-injection attacks Use 'intremap=no_x2apic_optout' to override BIOS request [...] Enabled IRQ remapping in xapic mode x2apic not enabled, IRQ remapping is in xapic mode This is inconsistent with itself -- interrupt remapping is *on*. Fix the mess by making the warnings say what they mean and my making sure that compatibility format interrupts (the dangerous ones) are disabled if x2apic is present regardless of BIOS settings. With this patch applied, the output is: Your BIOS is broken and requested that x2apic be disabled. This will slightly decrease performance. Use 'intremap=no_x2apic_optout' to override BIOS request. Enabled IRQ remapping in xapic mode x2apic not enabled, IRQ remapping is in xapic mode This should make us as or more secure than we are now and replace a rather scary warning with a much less scary warning on silly but functional systems. Signed-off-by: NAndy Lutomirski <luto@amacapital.net> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Prarit Bhargava <prarit@redhat.com> Cc: Gleb Natapov <gleb@redhat.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Alex Williamson <alex.williamson@redhat.com> Link: http://lkml.kernel.org/r/2011b943a886fd7c46079eb10bc24fc130587503.1359759303.git.luto@amacapital.netSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 28 1月, 2013 14 次提交
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由 Suravee Suthikulpanit 提交于
The IOMMU may stop processing page translations due to a perceived lack of credits for writing upstream peripheral page service request (PPR) or event logs. If the L2B miscellaneous clock gating feature is enabled the IOMMU does not properly register credits after the log request has completed, leading to a potential system hang. BIOSes are supposed to disable L2B micellaneous clock gating by setting L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b. This patch corrects that for those which do not enable this workaround. Signed-off-by: NSuravee Suthikulpanit <suravee.suthikulpanit@amd.com> Acked-by: NBorislav Petkov <bp@suse.de> Cc: stable@vger.kernel.org Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Cong Ding 提交于
The pointer obj is dereferenced in line 146 and 149 respectively, so it is not necessary to check null again in line 149 and 175. And I have checked that all the callers of these two functions guarantee the parameter obj passed is not null. Signed-off-by: NCong Ding <dinggnu@gmail.com> Acked-by: NOhad Ben-Cohen <ohad@wizery.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
The irq_remapped function is only used in IOMMU code after the last patch. So move its definition there too. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
This callback replaces the old __eoi_ioapic_pin function which needs a special path for interrupt remapping. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
This call-back points to the right function for initializing the msi_msg structure. The old code for msi_msg generation was split up into the irq-remapped and the default case. The irq-remapped case just calls into the specific Intel or AMD implementation when the device is behind an IOMMU. Otherwise the default function is called. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
This function does irq-remapping specific interrupt setup like modifying the chip defaults. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
The function is called unconditionally now in IO-APIC code removing another irq_remapped() check from x86 core code. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
Move all the code to either to the header file asm/irq_remapping.h or to drivers/iommu/. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
Remove the last left-over from this flag from x86 code. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
Move these checks to IRQ remapping code by introducing the panic_on_irq_remap() function. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
This pointer is changed to a different function when IRQ remapping is enabled. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
With interrupt remapping a special function is used to change the affinity of an IO-APIC interrupt. Abstract this with a function pointer. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
Use seperate routines to setup MSI IRQs for both irq_remapping_enabled cases. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Joerg Roedel 提交于
This function pointer can be overwritten by the IRQ remapping code. The irq_remapping_enabled check can be removed from default_setup_hpet_msi. Signed-off-by: NJoerg Roedel <joro@8bytes.org> Acked-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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