1. 06 10月, 2013 1 次提交
  2. 23 8月, 2013 1 次提交
    • W
      i2c: move OF helpers into the core · 687b81d0
      Wolfram Sang 提交于
      I2C of helpers used to live in of_i2c.c but experience (from SPI) shows
      that it is much cleaner to have this in the core. This also removes a
      circular dependency between the helpers and the core, and so we can
      finally register child nodes in the core instead of doing this manually
      in each driver. So, fix the drivers and documentation, too.
      Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      687b81d0
  3. 17 8月, 2013 1 次提交
    • L
      i2c: mxs: fix broken timing calculation · 869c6a3e
      Lothar Waßmann 提交于
      The timing calculation is rather bogus and gives extremely wrong
      results for higher frequencies (on an i.MX28). E.g. instead of 400 kHz
      I measured 770 kHz.
      
      Implement a calculation that adheres to the I2C spec and gives exact
      results for I2C frequencies from 12.56 kHz to 960 kHz.
      
      Also the bus_free and leadin parameters are programmed according to
      the I2C spec for standard and fast mode.
      
      This was tested on a Ka-Ro TX28 module with a DS1339, TSC2007, PCA9554
      and SGTL5000 client.
      Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
      Acked-by: NMarek Vasut <marex@denx.de>
      [wsa: patch fixes whitespace issue, too]
      Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      869c6a3e
  4. 15 8月, 2013 1 次提交
  5. 05 8月, 2013 1 次提交
  6. 13 6月, 2013 1 次提交
  7. 16 4月, 2013 2 次提交
    • L
      i2c: mxs: do error checking and handling in PIO mode · 92b775c2
      Lucas Stach 提交于
      In PIO mode we can end up with the same errors as in DMA mode, but as IRQs
      are disabled there we have to check for them manually after each command.
      
      Also don't use the big controller reset hammer when receiving a NAK from a
      slave. It's sufficient to tell the controller to continue at a clean state.
      Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
      Tested-by: NMarek Vasut <marex@denx.de>
      Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      92b775c2
    • L
      i2c: mxs: remove races in PIO code · 535ebd21
      Lucas Stach 提交于
      This commit fixes the three following races in PIO code:
      
      - The CTRL0 register is racy in itself, when programming transfer state and
        run bit in the same cycle the hardware sometimes ends up using the state
        from the last transfer. Fix this by programming state in one cycle, make
        sure the write is flushed down APBX bus by reading back the reg and only
        then trigger the run bit.
      
      - Only clear the DMAREQ bit in DEBUG0 after the read/write to the data reg
        happened. Otherwise we are racing with the hardware about who touches
        the data reg first.
      
      - When checking for completion of a transfer it's not sufficient to check
        if the data engine finished, but also a check for i2c bus idle is needed.
        In PIO mode we are really fast to program the next transfer after a finished
        one, so the controller possibly tries to start a new transfer while the
        clkgen engine is still busy writing the NAK/STOP from the last transfer to
        the bus.
      Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
      Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      535ebd21
  8. 04 4月, 2013 1 次提交
  9. 02 4月, 2013 1 次提交
  10. 22 2月, 2013 1 次提交
  11. 11 2月, 2013 1 次提交
  12. 28 1月, 2013 1 次提交
    • M
      i2c: mxs: Add PIO and mixed-DMA support · fc91e401
      Marek Vasut 提交于
      Add support for the PIO mode and mixed PIO/DMA mode support. The mixed
      PIO/DMA is the default mode of operation. This shall leverage overhead
      that the driver creates due to setting up DMA descriptors even for very
      short transfers.
      
      The current boundary between PIO/DMA 8 bytes, transfers shorter than 8
      bytes are transfered by PIO, longer transfers use DMA. The performance
      of write transfers remains unchanged, while there is a minor improvement
      of read performance. Reading 16KB EEPROM with DMA-only operations gives
      a read speed of 39.5KB/s, while with then new mixed-mode the speed is
      blazing 40.6KB/s.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      fc91e401
  13. 22 1月, 2013 1 次提交
  14. 21 1月, 2013 1 次提交
    • M
      i2c: mxs: Fix misuse init_completion · 85de7fac
      Marek Vasut 提交于
      The init_completion() call does reinit not only the variable carrying
      the flag that the completion finished, but also initialized the
      waitqueue associated with the completion. On the contrary, the
      INIT_COMPLETION() call only reinits the flag.
      
      In case there was anything still stuck in the waitqueue, subsequent call
      to init_completion() would be able to create possible race condition. This
      patch uses the proper function and moves init_completion() into .probe() call
      of the driver, to be issued only once.
      
      Note that such scenario is impossible, since two threads can never enter the
      mxs_i2c_xfer_msg(), since whole this section is protected by mutex in I2C core.
      This by no means allows this issue to exit though.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      85de7fac
  15. 23 12月, 2012 1 次提交
  16. 23 11月, 2012 3 次提交
  17. 02 11月, 2012 1 次提交
    • W
      i2c: mxs: remove broken PIOQUEUE support · 82fa63bd
      Wolfram Sang 提交于
      This I2C master can do DMA and PIOQUEUE (PIO with FIFO). Originally,
      only PIOQUEUE was supported and it had issues, then DMA support was added
      this cycle. The original intention was to keep PIOQUEUE since it has
      less overhead what is nice for small transfers. However, runtime
      switching between PIOQEUE and DMA depending on the transfer size never
      worked despite a lot of trying. Since PIOQUEUE mode itself was flaky
      (polling at places where interrupts failed to work) and the
      implementation also imposed a size limit for transfers, it is best to
      remove the support, so users don't fall over its limitations. It also
      makes the driver a lot cleaner and more robust. If somebody really wants
      less overhead, plain PIO mode could still be implemented with the
      addidtional advantage that this mode is also available on MX23, too.
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      Reviewed-by: NMarek Vasut <marex@denx.de>
      82fa63bd
  18. 08 10月, 2012 1 次提交
  19. 12 9月, 2012 1 次提交
  20. 13 7月, 2012 1 次提交
  21. 09 7月, 2012 1 次提交
  22. 13 5月, 2012 1 次提交
  23. 12 5月, 2012 1 次提交
  24. 27 4月, 2012 1 次提交
    • W
      i2c: mxs: disable QUEUE when sending is done · 1e4f0b82
      Wolfram Sang 提交于
      Since the last fixes to this driver ensure now the queue termination is
      done correctly, we can finally disable the queue after a transfer
      without problems. The gain is that it will only be reenabled after the
      next transfer is fully set up. Before, the queue was running all the
      time and if the setup of the next message was interrupted by another
      thread, an incomplete buffer could have been sent, padded with zeroes.
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      1e4f0b82
  25. 26 4月, 2012 1 次提交
  26. 21 4月, 2012 1 次提交
  27. 25 2月, 2012 1 次提交
    • W
      i2c: mxs: only flag completion when queue is completely done · 844990da
      Wolfram Sang 提交于
      The hardware generates an interrupt for every completed command in the
      queue while the code assumed that it will only generate one interrupt
      when the queue is empty. So, explicitly check if the queue is really
      empty. This patch fixed problems which occurred due to high traffic on
      the bus. While we are here, move the completion-initialization after the
      parameter error checking.
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Marek Vasut <marek.vasut@gmail.com>
      Cc: Lothar Waßmann <LW@KARO-electronics.de>
      Cc: stable@kernel.org
      844990da
  28. 31 3月, 2011 1 次提交
  29. 21 3月, 2011 1 次提交
  30. 23 2月, 2011 1 次提交