- 03 4月, 2015 1 次提交
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由 Tony Lindgren 提交于
Add a minimal driver for dm816x USB. This makes USB work on dm816x without any other changes needed as it can use the existing musb_dsps glue layer for the USB controller. Note that this phy is different from dm814x and am335x. Cc: Bin Liu <binmlist@gmail.com> Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Bolle <pebolle@tiscali.nl> Cc: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 30 1月, 2015 1 次提交
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由 Yunzhi Li 提交于
This patch to add a generic PHY driver for ROCKCHIP usb PHYs, currently this driver can support RK3288. The RK3288 SoC have three independent USB PHY IPs which are all configured through a set of registers located in the GRF (general register files) module. Signed-off-by: NYunzhi Li <lyz@rock-chips.com> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 21 1月, 2015 3 次提交
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由 Yaniv Gardi 提交于
This change adds a support for a 14nm qcom-ufs phy that is required in platforms that use ufs-qcom controller. Signed-off-by: NYaniv Gardi <ygardi@codeaurora.org> Reviewed-by: NDov Levenglick <dovl@codeaurora.org> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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由 Yaniv Gardi 提交于
This change adds a support for a 20nm qcom-ufs phy that is required in platforms that use ufs-qcom controller. Signed-off-by: NYaniv Gardi <ygardi@codeaurora.org> Reviewed-by: NDov Levenglick <dovl@codeaurora.org> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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由 Yaniv Gardi 提交于
This change adds a generic and common API support for ufs phy QUALCOMM Technologies. This support provides common code and also points to specific phy callbacks to differentiate between different behaviors of frequent use-cases (like power on, power off, phy calibration etc). Signed-off-by: NYaniv Gardi <ygardi@codeaurora.org> Reviewed-by: NDov Levenglick <dovl@codeaurora.org> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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- 26 11月, 2014 1 次提交
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由 Gregory CLEMENT 提交于
The Armada 375 SoC comes with an USB2 host and device controller and an USB3 controller. The USB cluster control register allows to manage common features of both USB controllers. This commit adds a driver integrated in the generic PHY framework to control this USB cluster feature. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> [ kishon@ti.com : Made it to use the updated devm_phy_create API and soem cosmentic changes in Kconfig file.] Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Acked-by: NJason Cooper <jason@lakedaemon.net>
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- 21 11月, 2014 1 次提交
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由 Antoine Tenart 提交于
Add the driver driving the Marvell Berlin USB PHY. This allows to initialize the PHY and to use it from the USB driver later. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 12 11月, 2014 1 次提交
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由 Gabriel FERNANDEZ 提交于
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe or USB3 devices. Signed-off-by: Nalexandre torgue <alexandre.torgue@st.com> Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NGabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 24 9月, 2014 3 次提交
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由 Peter Griffin 提交于
This driver adds support for USB (1.1 and 2.0) phy for STiH415 and STiH416 System-On-Chips from STMicroelectronics. Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com> Signed-off-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Peter Griffin 提交于
This is the generic phy driver for the picoPHY ports used by the USB2 and USB3 Host controllers when controlling usb2/1.1 devices. It is found on STiH407 SoC family from STMicroelectronics. Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Sergei Shtylyov 提交于
This PHY, though formally being a part of Renesas USBHS controller, contains the UGCTRL2 register that controls multiplexing of the USB ports (Renesas calls them channels) to the different USB controllers: channel 0 can be connected to either PCI EHCI/OHCI or USBHS controllers, channel 2 can be connected to PCI EHCI/OHCI or xHCI controllers. This is a new driver for this USB PHY currently already supported under drivers/ usb/phy/. The reason for writing the new driver was the requirement that the multiplexing of USB channels to the controller be dynamic, depending on what USB drivers are loaded, rather than static as provided by the old driver. The infrastructure provided by drivers/phy/phy-core.c seems to fit that purpose ideally. The new driver only supports device tree probing for now. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 22 7月, 2014 5 次提交
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由 Lee Jones 提交于
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe devices. It has 2 ports which it can use for either; both SATA, both PCIe or one of each in any configuration. Acked-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Kumar Gala 提交于
Add a PHY driver for uses with AHCI based SATA controller driver on the IPQ806x family of SoCs. Signed-off-by: NKumar Gala <galak@codeaurora.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Antoine Ténart 提交于
The Berlin SoC has a two SATA ports. Add a PHY driver to handle them. The mode selection can let us think this PHY can be configured to fit other purposes. But there are reasons to think the SATA mode will be the only one usable: the PHY registers are only accessible indirectly through two registers in the SATA range, the PHY seems to be integrated and no information tells us the contrary. For these reasons, make the driver a SATA PHY driver. Signed-off-by: NAntoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Srinivas Kandagatla 提交于
Add a PHY driver for uses with AHCI based SATA controller driver on the APQ8064 family of SoCs. This patch is a forward port from Qualcomm's v3.4 andriod kernel. Tested on IFC6410 board. CC: Sujit Reddy Thumma <sthumma@codeaurora.org> Tested-by: NKiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Jiancheng Xue 提交于
Add hix5hd2-sata-phy driver on Hisilicon hix5hd2 soc. Signed-off-by: NJiancheng Xue <xuejiancheng@huawei.com> Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 19 7月, 2014 1 次提交
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由 Mateusz Krawczuk 提交于
Add support for the Samsung's S5PV210 SoC to the Exynos USB 2.0 PHY driver. Signed-off-by: NMateusz Krawczuk <m.krawczuk@partner.samsung.com> [k.debski@samsung.com: cleanup and commit description] [k.debski@samsung.com: make changes accordingly to the mailing list comments] Signed-off-by: NKamil Debski <k.debski@samsung.com> Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 14 7月, 2014 1 次提交
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由 Pratyush Anand 提交于
ARM based ST Microelectronics's SPEAr1310/40 platforms uses ST's phy (known as 'miphy') for PCIe and SATA. This patch adds drivers for these miphys. This also adds proper bindings for miphys. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Tested-by: NMohit Kumar <mohit.kumar@st.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> [viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches] Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
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- 13 5月, 2014 1 次提交
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由 Vivek Gautam 提交于
Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs. The new driver uses the generic PHY framework and will interact with DWC3 controller present on Exynos5 series of SoCs. Also, created a new header file in linux/mfd/syscon/ for Exynos5 SoCs and put the required PMU offset definitions for the basic available PHYs. Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 25 4月, 2014 1 次提交
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由 Arnd Bergmann 提交于
The top-level phy-samsung-usb2 driver may be configured as a loadable module, which currently causes link errors because of the dependency on the exynos{5250,4x12,4210}_usb2_phy_config symbol. Solving this could be achieved by exporting these symbols, but as the SoC-specific parts of the driver are not currently built as modules, it seems better to just link everything into one module and avoid the need for the export. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NKamil Debski <k.debski@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 09 3月, 2014 2 次提交
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由 Loc Ho 提交于
This patch adds support for the APM X-Gene SoC 15Gbps Multi-purpose PHY. This is the physical layer interface for the corresponding host controller. Currently, only external clock and Gen3 SATA mode are supported. Signed-off-by: NLoc Ho <lho@apm.com> Signed-off-by: NTuan Phan <tphan@apm.com> Signed-off-by: NSuman Tripathi <stripathi@apm.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Kishon Vijay Abraham I 提交于
Rename struct omap_control_usb to struct omap_control_phy since it can be used to control PHY of USB, SATA and PCIE. Also move the driver and include files under *phy* and made the corresponding changes in the users of phy-omap-control. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com>
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- 08 3月, 2014 2 次提交
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由 Kamil Debski 提交于
Add support for Exynos 5250. This driver is to replace the old USB 2.0 PHY driver. Signed-off-by: NKamil Debski <k.debski@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Kamil Debski 提交于
Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic PHY framework. The driver includes support for the Exynos 4x10 and 4x12 SoC families. Signed-off-by: NKamil Debski <k.debski@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 06 3月, 2014 1 次提交
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由 Kishon Vijay Abraham I 提交于
Adapted omap-usb3 PHY driver to Generic PHY Framework and moved phy-omap-usb3 driver in drivers/usb/phy to drivers/phy and also renamed the file to phy-ti-pipe3 since this same driver will be used for SATA PHY and PCIE PHY. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 03 3月, 2014 2 次提交
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由 Hans de Goede 提交于
The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed through a single set of registers. Besides this there are also some other phy related bits which need poking, which are per phy, but shared between the ohci and ehci controllers, so these are also controlled from this new phy driver. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Yuvaraj Kumar C D 提交于
This patch adds the SATA PHY driver for Exynos5250.This driver uses the generic PHY framework to deal with SATA PHY.Exynos5250 SATA PHY comprises of CMU and TRSV blocks which are of I2C register Map.So this driver configures the CMU and TRSV block of exynos5250 SATA PHY using i2c. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: NGirish K S <ks.giri@samsung.com> Signed-off-by: NVasanth Ananthan <vasanth.a@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 25 12月, 2013 1 次提交
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由 Andrew Lunn 提交于
Kirkwood and Dove can turn the SATA phy on and off. Add a PHY driver to control this. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 24 12月, 2013 1 次提交
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由 Matt Porter 提交于
Add a driver for the internal Broadcom Kona USB 2.0 PHY found on the BCM281xx family of SoCs. Signed-off-by: NMatt Porter <mporter@linaro.org> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 17 10月, 2013 2 次提交
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由 Jingoo Han 提交于
Add a PHY provider driver for the Samsung Exynos SoC Display Port PHY. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sylwester Nawrocki 提交于
Add a PHY provider driver for the Samsung S5P/Exynos SoC MIPI CSI-2 receiver and MIPI DSI transmitter DPHYs. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 28 9月, 2013 3 次提交
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由 Kishon Vijay Abraham I 提交于
Used the generic PHY framework API to create the PHY. For powering on and powering off the PHY, power_on and power_off ops are used. Once the MUSB OMAP glue is adapted to the new framework, the suspend and resume ops of usb phy library will be removed. Also twl4030-usb driver is moved to drivers/phy/. However using the old usb phy library cannot be completely removed because otg is intertwined with phy and moving to the new framework completely will break otg. Once we have a separate otg state machine, we can get rid of the usb phy library. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Kishon Vijay Abraham I 提交于
Used the generic PHY framework API to create the PHY. Now the power off and power on are done in omap_usb_power_off and omap_usb_power_on respectively. The omap-usb2 driver is also moved to driver/phy. However using the old USB PHY library cannot be completely removed because OTG is intertwined with PHY and moving to the new framework will break OTG. Once we have a separate OTG state machine, we can get rid of the USB PHY library. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Kishon Vijay Abraham I 提交于
The PHY framework provides a set of APIs for the PHY drivers to create/destroy a PHY and APIs for the PHY users to obtain a reference to the PHY with or without using phandle. For dt-boot, the PHY drivers should also register *PHY provider* with the framework. PHY drivers should create the PHY by passing id and ops like init, exit, power_on and power_off. This framework is also pm runtime enabled. The documentation for the generic PHY framework is added in Documentation/phy.txt and the documentation for dt binding can be found at Documentation/devicetree/bindings/phy/phy-bindings.txt Cc: Tomasz Figa <t.figa@samsung.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> Tested-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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