1. 09 8月, 2016 1 次提交
    • M
      drm/i915/dp: Revert "drm/i915/dp: fall back to 18 bpp when sink capability is unknown" · 196f954e
      Mario Kleiner 提交于
      This reverts commit 013dd9e0
      ("drm/i915/dp: fall back to 18 bpp when sink capability is unknown")
      
      This commit introduced a regression into stable kernels,
      as it reduces output color depth to 6 bpc for any video
      sink connected to a Displayport connector if that sink
      doesn't report a specific color depth via EDID, or if
      our EDID parser doesn't actually recognize the proper
      bpc from EDID.
      
      Affected are active DisplayPort->VGA converters and
      active DisplayPort->DVI converters. Both should be
      able to handle 8 bpc, but are degraded to 6 bpc with
      this patch.
      
      The reverted commit was meant to fix
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=105331
      
      A followup patch implements a fix for that specific bug,
      which is caused by a faulty EDID of the affected DP panel
      by adding a new EDID quirk for that panel.
      
      DP 18 bpp fallback handling and other improvements to
      DP sink bpc detection will be handled for future
      kernels in a separate series of patches.
      
      Please backport to stable.
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Acked-by: NJani Nikula <jani.nikula@intel.com>
      Cc: stable@vger.kernel.org
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      196f954e
  2. 30 7月, 2016 1 次提交
  3. 19 7月, 2016 1 次提交
  4. 18 7月, 2016 1 次提交
  5. 08 7月, 2016 1 次提交
  6. 07 7月, 2016 8 次提交
  7. 05 7月, 2016 1 次提交
  8. 04 7月, 2016 3 次提交
  9. 03 7月, 2016 1 次提交
  10. 02 7月, 2016 1 次提交
    • C
      drm/i915: Spin after waking up for an interrupt · f69a02c9
      Chris Wilson 提交于
      When waiting for an interrupt (waiting for the engine to complete some
      work), we know we are the only waiter to be woken on this engine. We also
      know when the GPU has nearly completed our request (or at least started
      processing it), so after being woken and we detect that the GPU is
      active and working on our request, allow us the bottom-half (the first
      waiter who wakes up to handle checking the seqno after the interrupt) to
      spin for a very short while to reduce client latencies.
      
      The impact is minimal, there was an improvement to the realtime-vs-many
      clients case, but exporting the function proves useful later. However,
      it is tempting to adjust irq_seqno_barrier to include the spin. The
      problem is first ensuring that the "start-of-request" seqno is coherent
      as we use that as our basis for judging when it is ok to spin. If we
      could, spinning there could dramatically shorten some sleeps, and allow
      us to make the barriers more conservative to handle missed seqno writes
      on more platforms (all gen7+ are known to have the occasional issue, at
      least).
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1467390209-3576-7-git-send-email-chris@chris-wilson.co.uk
      f69a02c9
  11. 30 6月, 2016 17 次提交
  12. 29 6月, 2016 4 次提交