- 03 10月, 2008 1 次提交
-
-
由 Victor Gallardo 提交于
Add support for the phy types found on the Arches and other PowerPC 460 based boards. Signed-off-by: NVictor Gallardo <vgallardo@amcc.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NJeff Garzik <jeff@garzik.org> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
-
- 25 9月, 2008 1 次提交
-
-
由 Harvey Harrison 提交于
__FUNCTION__ is gcc-specific, use __func__ Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
-
- 08 12月, 2007 3 次提交
-
-
由 Benjamin Herrenschmidt 提交于
This updates the copyright notices of the new EMAC driver to avoid confusion as who is to be blamed for new bugs. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJeff Garzik <jeff@garzik.org>
-
由 Stefan Roese 提交于
This adds support for the Agere ET1011c PHY as found on the AMCC Taishan board. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJeff Garzik <jeff@garzik.org>
-
由 Stefan Roese 提交于
This patch adds BCM5248 and Marvell 88E1111 PHY support to NEW EMAC driver. These PHY chips are used on PowerPC 440EPx boards. The PHY code is based on the previous work by Stefan Roese <sr@denx.de> Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJeff Garzik <jeff@garzik.org>
-
- 11 10月, 2007 1 次提交
-
-
由 David Gibson 提交于
Based on BenH's earlier work, this is a new version of the EMAC driver for the built-in ethernet found on PowerPC 4xx embedded CPUs. The same ASIC is also found in the Axon bridge chip. This new version is designed to work in the arch/powerpc tree, using the device tree to probe the device, rather than the old and ugly arch/ppc OCP layer. This driver is designed to sit alongside the old driver (that lies in drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The old driver is left in place to support arch/ppc until arch/ppc itself reaches its final demise (not too long now, with luck). This driver still has a number of things that could do with cleaning up, but I think they can be fixed up after merging. Specifically: - Should be adjusted to properly use the dma mapping API. Axon needs this. - Probe logic needs reworking, in conjuction with the general probing code for of_platform devices. The dependencies here between EMAC, MAL, ZMII etc. make this complicated. At present, it usually works, because we initialize and register the sub-drivers before the EMAC driver itself, and (being in driver code) runs after the devices themselves have been instantiated from the device tree. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NJeff Garzik <jeff@garzik.org>
-
- 18 5月, 2007 1 次提交
-
-
由 Eugene Surovegin 提交于
Original patch is from Jeff Haran <jharan@brocade.com> with my minor style fixes. His comments follow: The first problem was in the function that configures the PHY for autonegotiation, genmii_setup_aneg(). The original code does a read/modify/write of the autonegotiation advertizement register (reg 4), followed by a read/modify/write of the control register (reg 0). While the original code follows the proper procedure as per reading the IEEE specs, what I found is that on at least one PHY model (National DP83843) the read of the control register comes back with the soft reset bit set (bit 15). Because of the read/modify/write operation, this causes the write to write a 1 back to the reset bit, which initiates a software reset of the PHY. This software reset causes the PHY to return to its power up state which advertizes all modes of operation, thus negating the write to the autoneg advertizement register. The modification is to spin reading the control register until the soft reset bit is clear before doing the modify/write. The second problem was in the function that configures the PHY for forced operation, genmii_setup_forced(). The original code initiates a software reset operation via a write of a 1 to bit 15 of the control register (reg 0), but then proceeds to do a second write to that same register without waiting until that reset bit is cleared by the PHY itself (which according to the IEEE specs indicates that the PHY reset is complete). This is a violation of how one is supposed to use this software reset feature of these PHYs and I believe was the cause of mysterious, difficult to reproduce link failures that we've observed on some of our systems that use this driver. The fix is to modify the function so that it spins waiting for the reset bit to clear after doing the soft reset and before doing the subsequent write. Signed-off-by: NJeff Haran <jharan@brocade.com> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NEugene Surovegin <ebs@ebshome.net> Signed-off-by: NJeff Garzik <jeff@garzik.org>
-
- 27 12月, 2006 1 次提交
-
-
由 Hynek Petrak 提交于
I have a system with AMCC PowerPC 405EP and PHY Intel LXT971A. Linux 2.6.18.3 is not able to detect the PHY ID correctly. The PHY ID detected is 0, but should be 0x1d. This is because phy_read() (__emac_mdio_read() resp.) from drivers/net/ibm_emac/ibm_emac_core.c might return -ETIMEDOUT or -EREMOTEIO on error. This is ignored inside the int mii_phy_probe(struct mii_phy *phy, int address) from drivers/net/ibm_emac/ibm_emac_phy.c as the return value is assigned to an u32 variable. Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NJeff Garzik <jeff@garzik.org>
-
- 01 7月, 2006 1 次提交
-
-
由 Jörn Engel 提交于
Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
-
- 30 10月, 2005 1 次提交
-
-
由 Eugene Surovegin 提交于
* MII registers must override strap pins * disable "echo" mode to make 10/HDX work (Franz Sirl) Signed-off-by: NEugene Surovegin <ebs@ebshome.net> Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
-
- 29 10月, 2005 1 次提交
-
-
由 Eugene Surovegin 提交于
This patch replaces current PowerPC 4xx EMAC driver with new, re-written from the scratch version. This patch is quite big (~234K) because there is virtualy 0% of common code between old and new version. New driver uses NAPI, it solves stability problems under heavy packet load and low memory, corrects chip register access and fixes numerous small bugs I don't even remember now. This patch has been tested on all supported in 2.6 PPC 4xx boards. It's been used in production for almost a year now on custom 4xx hardware. PPC32 specific parts are already upstream. Patch was acked by the current EMAC driver maintainer (Matt Porter). I will be maintaining this new version. Signed-off-by: NEugene Surovegin <ebs@ebshome.net> -- Kconfig | 72 ibm_emac/Makefile | 13 ibm_emac/ibm_emac.h | 418 +++-- ibm_emac/ibm_emac_core.c | 3414 ++++++++++++++++++++++++---------------------- ibm_emac/ibm_emac_core.h | 313 ++-- ibm_emac/ibm_emac_debug.c | 377 ++--- ibm_emac/ibm_emac_debug.h | 63 ibm_emac/ibm_emac_mal.c | 674 +++++---- ibm_emac/ibm_emac_mal.h | 336 +++- ibm_emac/ibm_emac_phy.c | 335 ++-- ibm_emac/ibm_emac_phy.h | 105 - ibm_emac/ibm_emac_rgmii.c | 201 ++ ibm_emac/ibm_emac_rgmii.h | 68 ibm_emac/ibm_emac_tah.c | 111 + ibm_emac/ibm_emac_tah.h | 96 - ibm_emac/ibm_emac_zmii.c | 255 +++ ibm_emac/ibm_emac_zmii.h | 114 - 17 files changed, 4114 insertions(+), 2851 deletions(-) Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
-
- 17 4月, 2005 1 次提交
-
-
由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
-