1. 11 5月, 2009 3 次提交
  2. 02 5月, 2009 1 次提交
    • Y
      x86/irq: use move_irq_desc() in create_irq_nr() · 15e957d0
      Yinghai Lu 提交于
      move_irq_desc() will try to move irq_desc to the home node if
      the allocated one is not correct, in create_irq_nr().
      
      ( This can happen on devices that are on different nodes that
        are using MSI, when drivers are loaded and unloaded randomly. )
      
      v2: fix non-smp build
      v3: add NUMA_IRQ_DESC to eliminate #ifdefs
      
      [ Impact: improve irq descriptor locality on NUMA systems ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      LKML-Reference: <49F95EAE.2050903@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      15e957d0
  3. 28 4月, 2009 6 次提交
    • Y
      x86/irq: change MSI irq_desc to be more numa aware · d047f53a
      Yinghai Lu 提交于
      Try to get irq_desc on the home node in create_irq_nr().
      
      v2: don't check if we can move it when sparse_irq is not used
      v3: use move_irq_des, if that node is not what we want
      
      [ Impact: optimization, make MSI IRQ descriptors more NUMA aware ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      LKML-Reference: <49F6559F.7070005@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      d047f53a
    • Y
      irq: change io_apic_set_pci_routing() to use device parameter · 024154cf
      Yinghai Lu 提交于
      Make actual use of the device parameter passed down to
      io_apic_set_pci_routing() - to have the IRQ descriptor
      on the home node of the device.
      
      If no device has been passed down, we assume it's a platform
      device and use the boot node ID for the IRQ descriptor.
      
      [ Impact: optimization, make IO-APIC code more NUMA aware ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      LKML-Reference: <49F6557E.3080101@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      024154cf
    • Y
      irq: change ACPI GSI APIs to also take a device argument · a2f809b0
      Yinghai Lu 提交于
      We want to use dev_to_node() later on, to be aware of the 'home node'
      of the GSI in question.
      
      [ Impact: cleanup, prepare the IRQ code to be more NUMA aware ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: NLen Brown <lenb@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Len Brown <lenb@kernel.org>
      Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: linux-acpi@vger.kernel.org
      Cc: linux-ia64@vger.kernel.org
      LKML-Reference: <49F65560.20904@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a2f809b0
    • Y
      x86/irq: change irq_desc_alloc() to take node instead of cpu · 85ac16d0
      Yinghai Lu 提交于
      This simplifies the node awareness of the code. All our allocators
      only deal with a NUMA node ID locality not with CPU ids anyway - so
      there's no need to maintain (and transform) a CPU id all across the
      IRq layer.
      
      v2: keep move_irq_desc related
      
      [ Impact: cleanup, prepare IRQ code to be NUMA-aware ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Jeremy Fitzhardinge <jeremy@goop.org>
      LKML-Reference: <49F65536.2020300@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      85ac16d0
    • Y
      irq: change ->set_affinity() to return status · d5dedd45
      Yinghai Lu 提交于
      according to Ingo, change set_affinity() in irq_chip should return int,
      because that way we can handle failure cases in a much cleaner way, in
      the genirq layer.
      
      v2: fix two typos
      
      [ Impact: extend API ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: linux-arch@vger.kernel.org
      LKML-Reference: <49F654E9.4070809@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      d5dedd45
    • Y
      x86/irq: remove leftover code from NUMA_MIGRATE_IRQ_DESC · fcef5911
      Yinghai Lu 提交于
      The original feature of migrating irq_desc dynamic was too fragile
      and was causing problems: it caused crashes on systems with lots of
      cards with MSI-X when user-space irq-balancer was enabled.
      
      We now have new patches that create irq_desc according to device
      numa node. This patch removes the leftover bits of the dynamic balancer.
      
      [ Impact: remove dead code ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      LKML-Reference: <49F654AF.8000808@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      fcef5911
  4. 22 4月, 2009 1 次提交
    • S
      x86: x2apic, IR: remove reinit_intr_remapped_IO_APIC() · ff166cb5
      Suresh Siddha 提交于
      When interrupt-remapping is enabled, we are relying on
      setup_IO_APIC_irqs() to configure remapped entries in the
      IO-APIC, which comes little bit later after enabling
      interrupt-remapping.
      
      Meanwhile, restoration of old io-apic entries after enabling
      interrupt-remapping will not make the interrupts through
      io-apic functional anyway.
      
      So remove the unnecessary reinit_intr_remapped_IO_APIC() step.
      
      The longer story:
      
      When interrupt-remapping is enabled, IO-APIC entries need to be
      setup in the re-mappable format (pointing to
      interrupt-remapping table entries setup by the OS). This
      remapping configuration is happening in the same place where we
      traditionally configure IO-APIC (i.e., in
      setup_IO_APIC_irqs()).
      
      So when we enable interrupt-remapping successfully, there is no
      need to restore old io-apic RTE entries before we actually do a
      complete configuration shortly in setup_IO_APIC_irqs(). Old
      IO-APIC RTE's may be in traditional format (non re-mappable) or
      in re-mappable format pointing to interrupt-remapping table
      entries setup by BIOS. Restoring both of these will not make
      IO-APIC functional. We have to rely on setup_IO_APIC_irqs() for
      proper configuration by OS.
      
      So I am removing this unnecessary and broken step.
      
      [ Impact: remove unnecessary/broken IO-APIC setup step ]
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Acked-by: NWeidong Han <weidong.han@intel.com>
      Cc: dwmw2@infradead.org
      LKML-Reference: <20090420200450.552359000@linux-os.sc.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      ff166cb5
  5. 21 4月, 2009 2 次提交
  6. 19 4月, 2009 1 次提交
    • W
      x86, intr-remap: fix ack for interrupt remapping · 5d0ae2db
      Weidong Han 提交于
      Shouldn't call ack_apic_edge() in ir_ack_apic_edge(), because
      ack_apic_edge() does more than just ack: it also does irq migration
      in the non-interrupt-remapping case. But there is no such need for
      interrupt-remapping case, as irq migration is done in the process
      context.
      
      Similarly, ir_ack_apic_level() shouldn't call ack_apic_level, and
      instead should do the local cpu's EOI + directed EOI to the io-apic.
      
      ack_x2APIC_irq() is not neccessary, because ack_APIC_irq() will use MSR
      write for x2apic, and uncached write for non-x2apic.
      
      [ Impact: simplify/standardize intr-remap IRQ acking, fix on !x2apic ]
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NWeidong Han <weidong.han@intel.com>
      Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      Cc: iommu@lists.linux-foundation.org
      Cc: allen.m.kay@intel.com
      Cc: fenghua.yu@intel.com
      LKML-Reference: <1239957736-6161-3-git-send-email-weidong.han@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      5d0ae2db
  7. 14 4月, 2009 1 次提交
    • P
      x86, irq: Remove IRQ_DISABLED check in process context IRQ move · 6ec3cfec
      Pallipadi, Venkatesh 提交于
      As discussed in the thread here:
      
        http://marc.info/?l=linux-kernel&m=123964468521142&w=2
      
      Eric W. Biederman observed:
      
      > It looks like some additional bugs have slipped in since last I looked.
      >
      > set_irq_affinity does this:
      > ifdef CONFIG_GENERIC_PENDING_IRQ
      >        if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) {
      >                cpumask_copy(desc->affinity, cpumask);
      >                desc->chip->set_affinity(irq, cpumask);
      >        } else {
      >                desc->status |= IRQ_MOVE_PENDING;
      >                cpumask_copy(desc->pending_mask, cpumask);
      >        }
      > #else
      >
      > That IRQ_DISABLED case is a software state and as such it has nothing to
      > do with how safe it is to move an irq in process context.
      
      [...]
      
      >
      > The only reason we migrate MSIs in interrupt context today is that there
      > wasn't infrastructure for support migration both in interrupt context
      > and outside of it.
      
      Yes. The idea here was to force the MSI migration to happen in process
      context. One of the patches in the series did
      
              disable_irq(dev->irq);
              irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
              enable_irq(dev->irq);
      
      with the above patch adding irq/manage code check for interrupt disabled
      and moving the interrupt in process context.
      
      IIRC, there was no IRQ_MOVE_PCNTXT when we were developing this HPET
      code and we ended up having this ugly hack. IRQ_MOVE_PCNTXT was there
      when we eventually submitted the patch upstream. But, looks like I did a
      blind rebasing instead of using IRQ_MOVE_PCNTXT in hpet MSI code.
      
      Below patch fixes this. i.e., revert commit 932775a4
      and add PCNTXT to HPET MSI setup. Also removes copying of desc->affinity
      in generic code as set_affinity routines are doing it internally.
      Reported-by: N"Eric W. Biederman" <ebiederm@xmission.com>
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Acked-by: N"Eric W. Biederman" <ebiederm@xmission.com>
      Cc: "Li Shaohua" <shaohua.li@intel.com>
      Cc: Gary Hade <garyhade@us.ibm.com>
      Cc: "lcm@us.ibm.com" <lcm@us.ibm.com>
      Cc: suresh.b.siddha@intel.com
      LKML-Reference: <20090413222058.GB8211@linux-os.sc.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      6ec3cfec
  8. 10 4月, 2009 1 次提交
    • W
      x86, intr-remap: fix eoi for interrupt remapping without x2apic · 746cddd3
      Weidong Han 提交于
      To simplify level irq migration in the presence of interrupt-remapping,
      Suresh used a virtual vector (io-apic pin number) to eliminate io-apic
      RTE modification. Level triggered interrupt will appear as an edge to
      the local apic cpu but still as level to the IO-APIC. So in addition to
      do the local apic EOI, it still needs to do IO-APIC directed EOI to clear
      the remote IRR bit in the IO-APIC RTE. Pls refer to Suresh's patch for
      more details (commit 0280f7c4).
      
      Now interrupt remapping is decoupled from x2apic, it also needs to do the
      directed EOI for apic. Otherwise, apic interrupts won't work correctly.
      Signed-off-by: NWeidong Han <weidong.han@intel.com>
      Cc: iommu@lists.linux-foundation.org
      Cc: Weidong Han <weidong.han@intel.com>
      Cc: suresh.b.siddha@intel.com
      Cc: dwmw2@infradead.org
      Cc: allen.m.kay@intel.com
      LKML-Reference: <1239355037-22856-1-git-send-email-weidong.han@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      746cddd3
  9. 09 4月, 2009 1 次提交
    • G
      x86: consolidate SMP code in io_apic.c · e85abf8f
      Gary Hade 提交于
      Impact: Cleanup
      
      Reorganizes the code in arch/x86/kernel/io_apic.c by
      combining two '#ifdef CONFIG_SMP' regions.  In addition
      to making the code easier to understand the first
      '#ifdef CONFIG_SMP' region is moved to a location later
      in the file which will reduce the need for function
      forward declarations when the code subsequently revised.
      
      The only changes other than relocating code to a different
      position in the file were the removal of the assign_irq_vector()
      forward declaration which was no longer needed and some line
      length reduction formatting changes.
      Signed-off-by: NGary Hade <garyhade@us.ibm.com>
      Cc: lcm@us.ibm.com
      LKML-Reference: <20090408210725.GC11159@us.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e85abf8f
  10. 04 4月, 2009 2 次提交
  11. 26 3月, 2009 1 次提交
    • R
      x86: Correct behaviour of irq affinity · e06b1b56
      Rusty Russell 提交于
      Impact: get correct smp_affinity as user requested
      
      The effect of setting desc->affinity (ie. from userspace via sysfs) has
      varied over time.  In 2.6.27, the 32-bit code anded the value with
      cpu_online_map, and both 32 and 64-bit did that anding whenever a cpu
      was unplugged.
      
      2.6.29 consolidated this into one routine (and fixed hotplug) but
      introduced another variation: anding the affinity with cfg->domain.
      
      We should just set it to what the user said - if possible.
      
      (cpu_mask_to_apicid_and already takes cpu_online_mask into account)
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: N"Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      LKML-Reference: <49C94DDF.2010703@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e06b1b56
  12. 25 3月, 2009 1 次提交
    • Y
      x86: fix set_extra_move_desc calling · fa74c907
      Yinghai Lu 提交于
      Impact: fix bug with irq-descriptor moving when logical flat
      
      Rusty observed:
      
      > The effect of setting desc->affinity (ie. from userspace via sysfs) has varied
      > over time.  In 2.6.27, the 32-bit code anded the value with cpu_online_map,
      > and both 32 and 64-bit did that anding whenever a cpu was unplugged.
      >
      > 2.6.29 consolidated this into one routine (and fixed hotplug) but introduced
      > another variation: anding the affinity with cfg->domain.  Is this right, or
      > should we just set it to what the user said?  Or as now, indicate that we're
      > restricting it.
      
      Eric pointed out that desc->affinity should be what the user requested,
      if it is at all possible to honor the user space request.
      
      This bug got introduced by commit 22f65d31 "x86: Update io_apic.c to use
      new cpumask API".
      
      Fix it by moving the masking to before the descriptor moving ...
      Reported-by: NRusty Russell <rusty@rustcorp.com.au>
      Reported-by: NEric W. Biederman <ebiederm@xmission.com>
      LKML-Reference: <49C94134.4000408@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      fa74c907
  13. 23 3月, 2009 2 次提交
  14. 21 3月, 2009 1 次提交
  15. 18 3月, 2009 6 次提交
    • S
      x86: fix broken irq migration logic while cleaning up multiple vectors · 68a8ca59
      Suresh Siddha 提交于
      Impact: fix spurious IRQs
      
      During irq migration, we send a low priority interrupt to the previous
      irq destination. This happens in non interrupt-remapping case after interrupt
      starts arriving at new destination and in interrupt-remapping case after
      modifying and flushing the interrupt-remapping table entry caches.
      
      This low priority irq cleanup handler can cleanup multiple vectors, as
      multiple irq's can be migrated at almost the same time. While
      there will be multiple invocations of irq cleanup handler (one cleanup
      IPI for each irq migration), first invocation of the cleanup handler
      can potentially cleanup more than one vector (as the first invocation can
      see the requests for more than vector cleanup). When we cleanup multiple
      vectors during the first invocation of the smp_irq_move_cleanup_interrupt(),
      other vectors that are to be cleanedup can still be pending in the local
      cpu's IRR (as smp_irq_move_cleanup_interrupt() runs with interrupts disabled).
      
      When we are ready to unhook a vector corresponding to an irq, check if that
      vector is registered in the local cpu's IRR. If so skip that cleanup and
      do a self IPI with the cleanup vector, so that we give a chance to
      service the pending vector interrupt and then cleanup that vector
      allocation once we execute the lowest priority handler.
      
      This fixes spurious interrupts seen when migrating multiple vectors
      at the same time.
      
      [ This is apparently possible even on conventional xapic, although to
        the best of our knowledge it has never been seen.  The stable
        maintainers may wish to consider this one for -stable. ]
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      Cc: stable@kernel.org
      68a8ca59
    • S
      x86, ioapic: Fix non atomic allocation with interrupts disabled · 05c3dc2c
      Suresh Siddha 提交于
      Impact: fix possible race
      
      save_mask_IO_APIC_setup() was using non atomic memory allocation while getting
      called with interrupts disabled. Fix this by splitting this into two different
      function. Allocation part save_IO_APIC_setup() now happens before
      disabling interrupts.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      05c3dc2c
    • S
      x86, x2apic: cleanup ifdef CONFIG_INTR_REMAP in io_apic code · 29b61be6
      Suresh Siddha 提交于
      Impact: cleanup
      
      Clean up #ifdefs and replace them with helper functions.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      29b61be6
    • S
      x86, x2apic: cleanup the IO-APIC level migration with interrupt-remapping · 0280f7c4
      Suresh Siddha 提交于
      Impact: simplification
      
      In the current code, for level triggered migration, we need to modify the
      io-apic RTE with the update vector information, along with modifying interrupt
      remapping table entry(IRTE) with vector and destination. This is to ensure that
      remote IRR bit inthe IOAPIC RTE gets cleared when the cpu does EOI.
      
      With this patch, for level triggered, we eliminate the io-apic RTE modification
      (with the updated vector information), by using a virtual vector (io-apic pin
      number).  Real vector that is used for interrupting cpu will be coming from
      the interrupt-remapping table entry. Trigger mode in the IRTE will always be
      edge, and the actual level or edge trigger will be setup in the IO-APIC RTE.
      So a level triggered interrupt will appear as an edge to the local apic
      cpu but still as level to the IO-APIC.
      
      With this change, level irq migration can be done by simply modifying
      the interrupt-remapping table entry with out changing the io-apic RTE.
      And as the interrupt appears as edge at the cpu, in addition to do the
      local apic EOI, we need to do IO-APIC directed EOI to clear the remote
      IRR bit in  the IO-APIC RTE.
      
      This simplies the irq migration in the presence of interrupt-remapping.
      Idea-by: NRajesh Sankaran <rajesh.sankaran@intel.com>
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      0280f7c4
    • S
      x86, x2apic: use virtual wire A mode in disable_IO_APIC() with interrupt-remapping · 7c6d9f97
      Suresh Siddha 提交于
      Impact: make kexec work with x2apic
      
      disable_IO_APIC() gets called during crashdump aswell, which configures the
      IO-APIC/LAPIC so that legacy interrupts can be delivered for the kexec'd kernel.
      
      In the presence of interrupt-remapping, we need to change the
      interrupt-remapping configuration aswell as modifying IO-APIC for virtual wire
      B mode.
      
      To keep things simple during the crash, use virtual wire A mode
      (for which we don't need to touch io-apic and interrupt-remapping tables).
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      7c6d9f97
    • S
      x86, x2apic: enable fault handling for intr-remapping · 9d783ba0
      Suresh Siddha 提交于
      Impact: interface augmentation (not yet used)
      
      Enable fault handling flow for intr-remapping aswell. Fault handling
      code now shared by both dma-remapping and intr-remapping.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      9d783ba0
  16. 18 2月, 2009 2 次提交
  17. 16 2月, 2009 1 次提交
  18. 15 2月, 2009 1 次提交
  19. 10 2月, 2009 1 次提交
  20. 09 2月, 2009 5 次提交
    • Y
      x86: find nr_irqs_gsi with mp_ioapic_routing · 3f4a739c
      Yinghai Lu 提交于
      Impact: find right nr_irqs_gsi on some systems.
      
      One test-system has gap between gsi's:
      
      [    0.000000] ACPI: IOAPIC (id[0x04] address[0xfec00000] gsi_base[0])
      [    0.000000] IOAPIC[0]: apic_id 4, version 0, address 0xfec00000, GSI 0-23
      [    0.000000] ACPI: IOAPIC (id[0x05] address[0xfeafd000] gsi_base[48])
      [    0.000000] IOAPIC[1]: apic_id 5, version 0, address 0xfeafd000, GSI 48-54
      [    0.000000] ACPI: IOAPIC (id[0x06] address[0xfeafc000] gsi_base[56])
      [    0.000000] IOAPIC[2]: apic_id 6, version 0, address 0xfeafc000, GSI 56-62
      ...
      [    0.000000] nr_irqs_gsi: 38
      
      So nr_irqs_gsi is not right. some irq for MSI will overwrite with io_apic.
      
      need to get that with acpi_probe_gsi when acpi io_apic is used
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      3f4a739c
    • Y
      x86: find nr_irqs_gsi with mp_ioapic_routing · cc6c5006
      Yinghai Lu 提交于
      Impact: find right nr_irqs_gsi on some systems.
      
      One test-system has gap between gsi's:
      
      [    0.000000] ACPI: IOAPIC (id[0x04] address[0xfec00000] gsi_base[0])
      [    0.000000] IOAPIC[0]: apic_id 4, version 0, address 0xfec00000, GSI 0-23
      [    0.000000] ACPI: IOAPIC (id[0x05] address[0xfeafd000] gsi_base[48])
      [    0.000000] IOAPIC[1]: apic_id 5, version 0, address 0xfeafd000, GSI 48-54
      [    0.000000] ACPI: IOAPIC (id[0x06] address[0xfeafc000] gsi_base[56])
      [    0.000000] IOAPIC[2]: apic_id 6, version 0, address 0xfeafc000, GSI 56-62
      ...
      [    0.000000] nr_irqs_gsi: 38
      
      So nr_irqs_gsi is not right. some irq for MSI will overwrite with io_apic.
      
      need to get that with acpi_probe_gsi when acpi io_apic is used
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      cc6c5006
    • Y
      x86: check_timer cleanup · f72dccac
      Yinghai Lu 提交于
      Impact: make check-timer more robust potentially solve boot fragility
      
      For edge trigger io-apic routing, we already unmasked the pin via
      setup_IO_APIC_irq(), so don't unmask it again.
      
      Also call local_irq_disable() between timer_irq_works(), because it
      calls local_irq_enable() inside.
      
      Also remove not needed apic version reading for 64-bit
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f72dccac
    • Y
      x86: use NR_IRQS_LEGACY to replace 16 · abcaa2b8
      Yinghai Lu 提交于
      Impact: cleanup
      
      also could kill platform_legacy_irq
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      abcaa2b8
    • Y
      x86/irq: optimize nr_irqs · f1ee5548
      Yinghai Lu 提交于
      Impact: make nr_irqs depend more on cards used in a system
      
      depend on nr_irq_gsi more, and have a ratio for MSI.
      
      v2: make nr_irqs less than NR_VECTORS * nr_cpu_ids
          aka if only one cpu, we only can support nr_irqs = NR_VECTORS
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f1ee5548