1. 13 11月, 2017 1 次提交
  2. 11 11月, 2017 5 次提交
  3. 27 10月, 2017 2 次提交
  4. 18 10月, 2017 2 次提交
  5. 15 10月, 2017 1 次提交
    • V
      net: dsa: mv88e6xxx: setup random mac address · 04a69a17
      Vivien Didelot 提交于
      An Ethernet switch may support having a MAC address, which can be used
      as the switch's source address in transmitted full-duplex Pause frames.
      
      If a DSA switch supports the related .set_addr operation, the DSA core
      sets the master's MAC address on the switch. This won't make sense
      anymore in a multi-CPU ports system, because there won't be a unique
      master device assigned to a switch tree.
      
      Instead, setup the switch from within the Marvell driver with a random
      MAC address, and remove the .set_addr implementation.
      Signed-off-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      04a69a17
  6. 29 9月, 2017 2 次提交
  7. 21 8月, 2017 1 次提交
  8. 08 8月, 2017 5 次提交
  9. 02 8月, 2017 5 次提交
  10. 25 7月, 2017 1 次提交
  11. 20 7月, 2017 1 次提交
  12. 19 7月, 2017 7 次提交
  13. 21 6月, 2017 1 次提交
    • V
      net: dsa: mv88e6xxx: add irl_init_all op · cd8da8bb
      Vivien Didelot 提交于
      Some Marvell chips have an Ingress Rate Limit unit. But the command
      values slightly differs between models: 88E6352 use 3-bit for operations
      while 88E6390 use different 2-bit operations.
      
      This commit kills the IRL flags in favor of a new operation implementing
      the "Init all resources to the initial state" operation.
      
      This fixes the operation of 88E6390 family where 0x1000 means Read the
      selected resource 0, register 0 on port 16, instead of init all.
      
      A mv88e6xxx_irl_setup helper is added to wrap the operation call.
      Signed-off-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cd8da8bb
  14. 16 6月, 2017 6 次提交