This SoC has two PWM channels
Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: NRoland Stigge <stigge@antcom.de>

Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: NRoland Stigge <stigge@antcom.de>

LPC32xx SoC has a 128 bits unique id that can be used as a system
serial number, if none has been provided by atags or dt.
Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: NRoland Stigge <stigge@antcom.de>

Removed system.h as it only contained an inline for arch_reset()
Changed the existing board files to use .restart in there machine
descriptions.

Added device tree support for the restart controller.
Device tree support for mach-vt8500 is still a work-in-progress.
Signed-off-by: NTony Prisk <linux@prisktech.co.nz>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

On spear320 device supported mode are:

   * AUTO_NET_SMII_MODE
   * AUTO_NET_MII_MODE
   * AUTO_EXP_MODE
   * SMALL_PRINTERS_MODE
   * EXTENDED_MODE

spear320-evb board is designed for EXTENDED_MODE only, hence it does not
boot correctly in current form where pinctrl part for some devices fail.

Configure and boot the SPEAr320 evaluation board in EXTENDED_MODE.
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

   - Correct interrupt bindings for uart, ethernet and pmu.
   - Added interrupt binding for keyboard.
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

The max limit of con_id is 16 and dev_id is 20. As of now for spear6xx, many clk
ids are exceeding this predefined limit.

This patch is intended to rename clk ids like:
    mux_clk -> _mclk
    gate_clk -> _gclk
    synth_clk -> syn_clk
    ras_gen1_synth_gate_clk -> ras_syn1_gclk
    pll3_48m -> pll3_
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

The max limit of con_id is 16 and dev_id is 20. As of now for spear3xx, many clk
ids are exceeding this predefined limit.

This patch is intended to rename clk ids like:
    mux_clk -> _mclk
    gate_clk -> _gclk
    synth_clk -> syn_clk
    ras_gen1_synth_gate_clk -> ras_syn1_gclk
    ras_pll3_48m -> ras_pll3_
    pll3_48m -> pll3_
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

This patch fixes "bug: interrupts were enabled early" due to
do_settimeofday() which used in common code for clps711x-platform.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This override does not allow support for multiple machines in a single core.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Since we are trying to do to support multiple machines in a single kernel,
we need to eliminate the use of __initcall to be used for all machines.
Using .init_early call solves this problem.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

WARNING: at mm/vmalloc.c:1471 __iommu_free_buffer+0xcc/0xd0()
Trying to vfree() nonexistent vm area (ef095000)
Modules linked in:
[<c0015a18>] (unwind_backtrace+0x0/0xfc) from [<c0025a94>] (warn_slowpath_common+0x54/0x64)
[<c0025a94>] (warn_slowpath_common+0x54/0x64) from [<c0025b38>] (warn_slowpath_fmt+0x30/0x40)
[<c0025b38>] (warn_slowpath_fmt+0x30/0x40) from [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0)
[<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) from [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138)
[<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) from [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc)
[<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) from [<c0211230>] (drm_gem_object_free+0x28/0x34)
[<c0211230>] (drm_gem_object_free+0x28/0x34) from [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8)
[<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) from [<c01abe10>] (idr_for_each+0x74/0xb8)
[<c01abe10>] (idr_for_each+0x74/0xb8) from [<c02114e4>] (drm_gem_release+0x1c/0x30)
[<c02114e4>] (drm_gem_release+0x1c/0x30) from [<c0210ae8>] (drm_release+0x608/0x694)
[<c0210ae8>] (drm_release+0x608/0x694) from [<c00b75a0>] (fput+0xb8/0x228)
[<c00b75a0>] (fput+0xb8/0x228) from [<c00b40c4>] (filp_close+0x64/0x84)
[<c00b40c4>] (filp_close+0x64/0x84) from [<c0029d54>] (put_files_struct+0xe8/0x104)
[<c0029d54>] (put_files_struct+0xe8/0x104) from [<c002b930>] (do_exit+0x608/0x774)
[<c002b930>] (do_exit+0x608/0x774) from [<c002bae4>] (do_group_exit+0x48/0xb4)
[<c002bae4>] (do_group_exit+0x48/0xb4) from [<c002bb60>] (sys_exit_group+0x10/0x18)
[<c002bb60>] (sys_exit_group+0x10/0x18) from [<c000ee80>] (ret_fast_syscall+0x0/0x30)

This patch modifies the condition while freeing to match the condition
used while allocation. This fixes the above warning which arises when
array size is equal to PAGE_SIZE where allocation is done using kzalloc
but free is done using vfree.
Signed-off-by: NPrathyush K <prathyush.k@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>

Versatile Express platform can be used in different configurations,
the console UART used by early printk may be located at different
addresses in the address space.

This patch makes it possible to select the base address of a PL011
UART to be used as a console output in the kernel configuration.
The default behaviour is still the heuristic detecting memory map
on Cortex-A core tiles.

The zImage decompressor will use the same configuration values
or print out nothing if DEBUG_LL is not enabled.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

This patch adds Device Tree file for the CoreTile Express
A15x2 A7x3 (V2P-CA15_CA7).

Note that the A7 cpu nodes are commented out, as the
big.LITTLE-relevant patches are not upstreamed yet. Till
this time one can use the board with two A15 cores only,
keeping the A7s in reset by adding the following setting
to the board.txt file in Versatile Express configuration
tree:

SCC: 0x018 0x00001FFF
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

... to enable use of LPAE, which extends physical address space
to 40 bits.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

SMSC driver requires "vdd33a" and "vddvario" regulator supplies now.

Add fixed regulator describing 3V3 power line (in both motherboard's
Device Trees and the non-DT code) and force fixed regulator config
option if regulators framework is enabled.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

Signed-off-by: NPawel Moll <pawel.moll@arm.com>

This patch makes Versatile Express use the common clock framework
instead of the plat-versatile implementation.

It defines clock provider for VE's OSCs (clock generators) and
registers all required fixed and variable clock sources (for both
motherboard and core tile).

This is a simple conversion of the existing state and will be
extended (and migrated to drivers/clk) in the near future.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

mach-s3c24xx/include/mach/gta02.h header file contains defines
which are now not used anywhere, remove them.

Cc: Nelson Castillo <arhuaco@freaks-unidos.net>
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

There is no need now for individual GPIO port J pin control bit
definitions, the GPIO0..12 pins can be configured using the gpiolib
API. The GPJ* register address offset definitions for S3C2413 are
moved to the common mach-s3c24xx/include/mach/regs-gpio.h header.
These are still used outside of the gpio-samsung driver by PM code.

Switching GPJ port to camera function can be done for example with:
s3c_gpio_cfgall_range(S3C2410_GPJ(0), 13, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

There is now no more users of these compatibility definitions,
so remove them.
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Replace the S3C24XX SoC specific calls with the common gpiolib
API. This removes one more user of an obsolete GPIO API.
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Replace deprecated functions with the gpiolib ones.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Replace SoC specific GPIO functions with the gpiolib API. The LED
gpio is freed right after it is configured so it can be acquired
in the s3c24xx_led driver.

This change is required for converting the s3c24xx_led driver
to the gpiolib API.
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: NHarald Welte <laforge@gnumonks.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Replace SoC specific GPIO functions with the gpiolib API. The LED
gpios are freed right after they are initially configured so they
can be acquired in the s3c24xx_led driver.

This change is required for converting the s3c24xx_led driver
to the gpiolib API.
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The backlight gpio must not be left requested in the board
code, otherwise s3c24xx_led driver can't successfully claim it.
So request the backlight gpio, configure it to proper state and
gpio_free right away.

This change is required for converting the s3c24xx_led driver
to the gpiolib API.
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: NJuergen Beisert <jbe@pengutronix.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Properly define the CAMIF interrupt resources. This device have two
interrupts - corresponding to the "codec" and "preview" data paths.
IRQ_CAM is handled internally by the architecture and demultiplexed
to IRQ_S3C2440_CAM_C and IRQ_S3C2440_CAM_P - these interrupts only
should be handled in the driver.
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Use correct gate control bit for AC97 clock which is
S3C2440_CLKCON_AC97, not S3C2440_CLKCON_CAMERA.
Signed-off-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Checking for adc->ts_pend already claimed should be done with the
lock held.
Signed-off-by: NTodd Poynor <toddpoynor@google.com>
Acked-by: NBen Dooks <ben-linux@fluff.org>
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The rate of xusbxti clock is set in individual machine files.
The default value should be defined at the clock definition
and individual machine files should modify it if required.

Division by zero in kernel.
[<c0011849>] (unwind_backtrace+0x1/0x9c) from [<c022c663>] (Ldiv0+0x9/0x12)
[<c022c663>] (Ldiv0+0x9/0x12) from [<c001a3c3>] (s3c_setrate_clksrc+0x33/0x78)
[<c001a3c3>] (s3c_setrate_clksrc+0x33/0x78) from [<c0019e67>] (clk_set_rate+0x2f/0x78)
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Make it easier to switch to the common clock API by making the existing
clock API implementation depend on a Kconfig symbol which is enabled when
the common clock API is disabled. This means that we can have some SoCs
using the common clock API and some using the existing API rather than
needing a flag day to convert the entire family of devices over.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

arch/arm/mach-exynos/pmu.c:318:14: warning:
symbol 'exynos5_list_both_cnt_feed' was not declared. Should it be static?
arch/arm/mach-exynos/pmu.c:332:14: warning:
symbol 'exynos5_list_diable_wfi_wfe' was not declared. Should it be static?
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Fixes the following warning:
arch/arm/mach-exynos/common.c:543:13:
warning: symbol 'combiner_init' was not declared. Should it be static?
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adds clock setting entries for EXYNOS4212 and EXYNOS4412 platforms.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
[fixed compilation warning which is reported by Arnd Bergmann]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

... in preparation for common clock coming for Integrator
and Versatile Express.

Based on Linus Walleij's "ARM: integrator: convert to common
clock" patch.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

With recent enough motherboard firmware, core tile can be fitted
in either of the two daughterboard sites. The non-DT tile code for
V2P-CA9 did not check that when configuring DVI output nor setting
CLCD pixel clock.

Fixed now, providing "get master site" API in motherboard's code.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

The vexpress Kconfig setup tries to be clever^Whelpful and selects some
errata workarounds for certain revisions of the Cortex-A9 and PL310,
which may be required depending on the core tile.

Since the mach-vexpress can support A5, A7 and A15 coretiles, let's
make errata workaround selection optional.
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRob Herring <robherring2@gmail.com>
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

This patch adjusts the LPC32xx platform support to the new pl08x DMA interface,
fixing the compile error resulting from changed pl08x structures.
Signed-off-by: NRoland Stigge <stigge@antcom.de>