Skip to content

cloud-kernel
cloud-kernel

openanolis / cloud-kernel
1 年多 前同步成功

通知 160
Star 36
Fork 7
cloud-kernel
cloud-kernel
切换分支/标签
  1. 13 7月, 2008 1 次提交
  3. 11 7月, 2008 2 次提交
  5. 10 7月, 2008 7 次提交
  7. 07 7月, 2008 1 次提交
  9. 03 7月, 2008 4 次提交
  11. 03 6月, 2008 2 次提交
  13. 19 5月, 2008 1 次提交
  15. 19 4月, 2008 1 次提交
  17. 28 1月, 2008 6 次提交
  19. 16 10月, 2007 2 次提交
  21. 21 7月, 2007 1 次提交
  23. 13 12月, 2006 1 次提交
  25. 04 12月, 2006 1 次提交
    • L
      [ARM] 3881/4: xscale: clean up cp0/cp1 handling · afe4b25e
      由 Lennert Buytenhek 提交于 
      XScale cores either have a DSP coprocessor (which contains a single
40 bit accumulator register), or an iWMMXt coprocessor (which contains
eight 64 bit registers.)

Because of the small amount of state in the DSP coprocessor, access to
the DSP coprocessor (CP0) is always enabled, and DSP context switching
is done unconditionally on every task switch.  Access to the iWMMXt
coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is
first issued, and iWMMXt context switching is done lazily.

CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will
have iWMMXt support', but boards are supposed to select this config
symbol by hand, and at least one pxa27x board doesn't get this right,
so on that board, proc-xscale.S will incorrectly assume that we have a
DSP coprocessor, enable CP0 on boot, and we will then only save the
first iWMMXt register (wR0) on context switches, which is Bad.

This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on
might have iWMMXt support, and we will enable iWMMXt context switching
if it does.'  This means that with this patch, running a CONFIG_IWMMXT=n
kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt
state over context switches, and running a CONFIG_IWMMXT=y kernel on a
non-iWMMXt capable CPU will still do DSP context save/restore.

These changes should make iWMMXt work on PXA3xx, and as a side effect,
enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such
as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined),
as well as setting and using HWCAP_IWMMXT properly.
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Acked-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      afe4b25e
  27. 29 6月, 2006 1 次提交
  29. 20 6月, 2006 1 次提交
  31. 29 3月, 2006 1 次提交
  33. 06 1月, 2006 1 次提交
  35. 01 12月, 2005 1 次提交
  37. 29 11月, 2005 1 次提交
  39. 13 11月, 2005 1 次提交
  41. 11 11月, 2005 1 次提交
    • L
      [ARM] 3098/1: pxa2xx disable ssp irq · b216c018
      由 Liam Girdwood 提交于 
      Patch from Liam Girdwood

This patch allows users of the pxa SSP driver to register their own irq
handlers instead of using the default SSP handler. It also cleans up the
CKEN clock and irq detection as the values are now stored in a table.

This patch replaces 2845/1

Changes:-
o Added flags parameter to ssp_init()
o Added SSP_NO_IRQ flag to disable registering of ssp irq handler (for
drivers that want to register their own handler)
o Cleaned up clock and irq detection, values are now stored in table.
o Added build changes to allow other drivers (e.g audio) to select the
ssp driver.
o corgi_ssp.c changed to use new interface.
Signed-off-by: NLiam Girdwood <liam.girdwood@wolfsonmicro.com>
Signed-off-by: NRichard Purdie <rpurdie@rpsys.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b216c018
  43. 06 11月, 2005 1 次提交
  45. 13 9月, 2005 1 次提交