- 07 9月, 2013 12 次提交
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由 Tomasz Figa 提交于
This patch implements round_rate and set_rate callbacks of PLL46xx driver to allow reconfiguration of PLL at runtime. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
This patch modifies PLL46xx support code and its users to use the recently introduced common PLL registration helper. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
This patch implements round_rate and set_rate callbacks of PLL45xx driver to allow reconfiguration of PLL at runtime. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
This patch modifies PLL45xx support code and its users to use the recently introduced common PLL registration helper. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
This array defines PLLs specific to Exynos 4x12 SoCs and not for all Exynos 4 SoCs, so the name should represent that. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
Exynos 4 supports only DT based bootup, so non-DT cases does not need to be handled anymore. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
Since Exynos does not support legacy non-DT boot anymore, most of clock lookups happen using device tree, so most of static clkdev aliases are no longer necessary. This patch removes them. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
There is no need to use clkdev inside the clock driver to retrieve the clocks for internal use. Instead __clk_lookup() helper can be used to look up clocks by their platform name. This patch modifies the behavior of _get_rate() helper to look up clocks by platform name and adjusts all users of it to pass platform names instead of clkdev aliases. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
Exynos cpufreq driver is the only remaining piece of code that needs static clkdev aliases for operation, because it can not do device tree based clock lookups yet. This patch moves clock alias definitions for those clocks to separate arrays that can be used with samsung_clk_register_alias() helper. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
When booting with device tree static clkdev aliases should not be used. This patch modifies the samsung_pwm_timer driver to use DT-based clock lookup when booting with device tree. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
Since pwm-samsung bindings require at least one clock to be specified, this patch adds the missing clocks and clock-names properties to specify clocks used by PWM block on Exynos4 SoCs. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tomasz Figa 提交于
PWM driver consumes at least one and up to three clocks, which need to be specified in device tree when used. This patch updates bindings documentation to add information about clocks. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 04 9月, 2013 1 次提交
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由 Thierry Reding 提交于
The __clk_get_flags() symbol is exported immediately following the clk_unprepare_unused_subtree() function. This is unusual, since a symbol export typically follows body of the function that it exports. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 31 8月, 2013 2 次提交
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由 James Hogan 提交于
Commit 71472c0c (clk: add support for clock reparent on set_rate) added a dereference of the new_parent pointer in clk_reparent(), but as detected by smatch clk_reparent() later checks whether new_parent is NULL. The dereference was in order to clear the new parent's new_child pointer to avoid duplicate POST_RATE_CHANGE notifications, so clearly isn't necessary if the new parent is NULL, so move it inside the "if (new_parent)" block. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Mark Brown 提交于
Otherwise any attempt to interact with the hardware will crash. This is what happens when drivers get written blind. Signed-off-by: NMark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 30 8月, 2013 6 次提交
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由 Rahul Sharma 提交于
dout_pixel is a new ID allocated for pixel clock divider. It is queried in the driver to pass as the parent to hdmi clock while switching between parents. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Acked-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Rahul Sharma 提交于
hdmi driver needs to change the parent of hdmi clock to pixel clock or hdmiphy clock, based on the stability of hdmiphy. This patch is exposing the mux for changing the parent. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Acked-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Rahul Sharma 提交于
Listing sclk_hdmiphy at 0th position in the list of parents is causing wrong configuration in reg SRC_DISP10. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Acked-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Rahul Sharma 提交于
Adding sysmmu clock for mixer for exynos5420. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Acked-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Rahul Sharma 提交于
Add sclk_hdmiphy to the list of exposed clocks. This is required by hdmi driver to change the parent of hdmi clock. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Acked-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Mark Brown 提交于
Since the driver was written an is_prepared() operation has been made possible. Since the driver uses I2C I/O only prepare operations are provided so move the is_enabled() operation over to is_prepared(). Signed-off-by: NMark Brown <broonie@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 29 8月, 2013 2 次提交
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由 Rahul Sharma 提交于
parent of hdmi and mixer block is mentioned as aclk200 which is not correct. It is clocked by the ouput of aclk200_disp1. Hence parent for mixer and hdmi clocks is changed to aclk200_disp1. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tuomas Tynkkynen 提交于
The lock bit on PLL_U does not seem to be working correctly and sometimes never gets set when waiting for the PLL to come up. Remove the TEGRA_PLL_USE_LOCK flag to use a constant delay. Signed-off-by: NTuomas Tynkkynen <ttynkkynen@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 28 8月, 2013 14 次提交
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由 Sachin Kamat 提交于
__initdata should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Sachin Kamat 提交于
__initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Cc: Emilio López <emilio@elopez.com.ar> Signed-off-by: NMike Turquette <mturquette@linaro.org> [mturquette@linaro.org: refreshed patch based on sunxi changes]
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由 Sachin Kamat 提交于
__initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NGregory Clement <gregory.clement@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Sachin Kamat 提交于
__initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NGregory Clement <gregory.clement@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Sachin Kamat 提交于
__initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NGregory Clement <gregory.clement@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Sachin Kamat 提交于
__initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NGregory Clement <gregory.clement@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Sachin Kamat 提交于
__initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. While at it also make 'u300_clk_lookup' static as it is used only in this file. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Sachin Kamat 提交于
__initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Sachin Kamat 提交于
__initconst should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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https://github.com/mripard/linux由 Mike Turquette 提交于
Allwinner clock changes for 3.12 These patches mostly do some cleanup to introduce the basic gated clocks for the Allwinner A10s, A20 and A31 SoCs. Conflicts: drivers/clk/sunxi/clk-sunxi.c
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由 Gerhard Sittig 提交于
the common clock drivers were motivated/initiated by ARM development and apparently assume little endian peripherals wrap register/peripherals access in the common code (div, gate, mux) in preparation of adding COMMON_CLK support for other platforms Signed-off-by: NGerhard Sittig <gsi@denx.de> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Mike Turquette 提交于
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由 Alex Elder 提交于
Currently of_clk_init() finds a matching device node while holding the device tree spinlock. When a matching device node is found, the lock is dropped and then re-acquired in order to get a reference to the matching device id structure. Acquiring the spinlock twice is unnecessary (and it opens a vulnerable window that could conceivably lead to errors). There already exists an interface for both finding and taking a reference to a device id under lock, so use it. Signed-off-by: NAlex Elder <elder@linaro.org> Reviewed-by: NChristian Daudt <csd@broadcom.com> Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Emilio López 提交于
With the recent move towards CLK_OF_DECLARE(...), the driver stopped initializing osc32k, which is compatible "fixed-clock". This is because we never called of_clk_init(NULL). Fix this by moving the only other simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL) to initialize both of them. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 27 8月, 2013 1 次提交
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由 Tomasz Figa 提交于
This patch modifies PLL6552 and PLL6553 clock drivers to use recently added common Samsung PLL registration method. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 26 8月, 2013 2 次提交
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由 Maxime Ripard 提交于
The Allwinner A20 is almost identical to the earlier A10 SoC from Allwinner on many aspects, including the clocks tree. However, since the A20 has some additionnal IPs compared to the A10, the clock tree isn't exactly the same, especially when it comes to the gated clocks available. We thus need to register different clock gates for the A20. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NEmilio López <emilio@elopez.com.ar>
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由 Maxime Ripard 提交于
The A31 has a mostly different clock set compared to the other older SoCs currently supported in the Allwinner clock driver. Add support for the basic useful clocks. The other ones will come in eventually. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NEmilio López <emilio@elopez.com.ar>
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