- 31 12月, 2008 1 次提交
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由 Hollis Blanchard 提交于
KVM currently ignores the host's round robin TLB eviction selection, instead maintaining its own TLB state and its own round robin index. However, by participating in the normal 44x TLB selection, we can drop the alternate TLB processing in KVM. This results in a significant performance improvement, since that processing currently must be done on *every* guest exit. Accordingly, KVM needs to be able to access and increment tlb_44x_index. (KVM on 440 cannot be a module, so there is no need to export this symbol.) Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 29 12月, 2008 1 次提交
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由 Ilya Yanok 提交于
This adds support for 16k and 64k page sizes on PowerPC 44x processors. The PGDIR table is much smaller than a page when using 16k or 64k pages (512 and 32 bytes respectively) so we allocate the PGDIR with kzalloc() instead of __get_free_pages(). One PTE table covers rather a large memory area when using 16k or 64k pages (32MB or 512MB respectively), so we can easily put FIXMAP and PKMAP in the area covered by one PTE table. Signed-off-by: NYuri Tikhonov <yur@emcraft.com> Signed-off-by: NVladimir Panfilov <pvr@emcraft.com> Signed-off-by: NIlya Yanok <yanok@emcraft.com> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 21 12月, 2008 1 次提交
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由 Benjamin Herrenschmidt 提交于
This reworks the context management code used by 4xx,8xx and freescale BookE. It adds support for SMP by implementing a concept of stale context map to lazily flush the TLB on processors where a context may have been invalidated. This also contains the ground work for generalizing such lazy TLB flushing by just picking up a new PID and marking the old one stale. This will be implemented later. This is a first implementation that uses a global spinlock. Ideally, we should try to get at least the fast path (context ID already assigned) lockless or limited to a per context lock, but for now this will do. I tried to keep the UP case reasonably simple to avoid adding too much overhead to 8xx which does a lot of context stealing since it effectively has only 16 PIDs available. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 04 8月, 2008 1 次提交
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由 Stephen Rothwell 提交于
from include/asm-powerpc. This is the result of a mkdir arch/powerpc/include/asm git mv include/asm-powerpc/* arch/powerpc/include/asm Followed by a few documentation/comment fixups and a couple of places where <asm-powepc/...> was being used explicitly. Of the latter only one was outside the arch code and it is a driver only built for powerpc. Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 27 4月, 2008 1 次提交
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由 Hollis Blanchard 提交于
PowerPC 440 KVM needs to know how many TLB entries are used for the host kernel linear mapping (it does not modify these mappings when switching between guest and host execution). Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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- 17 4月, 2008 1 次提交
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由 Kumar Gala 提交于
Moved phys_addr_t out of mmu-*.h and into asm/types.h so we can use it in places that before would have caused recursive includes. For example to use phys_addr_t in <asm/page.h> we would have included <asm/mmu.h> which would have possibly included <asm/mmu-hash64.h> which includes <asm/page.h>. Wheeee recursive include. CONFIG_PHYS_64BIT is a bit counterintuitive in light of ppc64 systems and thus the config option is only used for ppc32 systems with >32-bit physical addresses (44x, 85xx, 745x, etc.). Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 17 5月, 2007 1 次提交
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由 David Gibson 提交于
There are no actual implementations of fixup_bigphys_addr() in arch/powerpc, and with a 64-bit aware ioremap() and so forth, it should no longer be necessary. This patch removes the last dregs of fixup_bigphys_addr() from arch/powerpc. In fact, the only reason this hasn't caused link errors already is that nobody must have tried using one of the small number of drivers using io_remap_pfn_range() on one of the small number of platforms which are 32-bit but define CONFIG_PHYS_64BIT. Nonetheless this fixes a bug, and should go into 2.6.22. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 08 5月, 2007 1 次提交
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由 David Gibson 提交于
This adds support for early serial debugging via the built in port on IBM/AMCC PowerPC 44x CPUs. It uses a bolted TLB entry in address space 1 for the UART's mapping, allowing robust debugging both before and after the initialization of the MMU. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 02 5月, 2007 1 次提交
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由 David Gibson 提交于
This patch takes the definitions for the PPC44x MMU (a software loaded TLB) from asm-ppc/mmu.h, cleans them up of things no longer necessary in arch/powerpc and puts them in a new asm-powerpc/mmu_44x.h file. It also substantially simplifies arch/powerpc/mm/44x_mmu.c and makes a couple of small fixes necessary for the 44x MMU code to build and work properly in arch/powerpc. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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