1. 15 8月, 2009 1 次提交
  2. 12 8月, 2009 1 次提交
  3. 22 7月, 2009 4 次提交
    • J
      intel_txt: Force IOMMU on for Intel TXT launch · a59b50e9
      Joseph Cihula 提交于
      The tboot module will DMA protect all of memory in order to ensure the that
      kernel will be able to initialize without compromise (from DMA).  Consequently,
      the kernel must enable Intel Virtualization Technology for Directed I/O
      (VT-d or Intel IOMMU) in order to replace this broad protection with the
      appropriate page-granular protection.  Otherwise DMA devices will be unable
      to read or write from memory and the kernel will eventually panic.
      
      Because runtime IOMMU support is configurable by command line options, this
      patch will force it to be enabled regardless of the options specified, and will
      log a message if it was required to force it on.
      
       dmar.c        |    7 +++++++
       intel-iommu.c |   17 +++++++++++++++--
       2 files changed, 22 insertions(+), 2 deletions(-)
      Signed-off-by: NJoseph Cihula <joseph.cihula@intel.com>
      Signed-off-by: NShane Wang <shane.wang@intel.com>
      Cc: David Woodhouse <dwmw2@infradead.org>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      a59b50e9
    • J
      x86, intel_txt: Intel TXT Sx shutdown support · 86886e55
      Joseph Cihula 提交于
      Support for graceful handling of sleep states (S3/S4/S5) after an Intel(R) TXT launch.
      
      Without this patch, attempting to place the system in one of the ACPI sleep
      states (S3/S4/S5) will cause the TXT hardware to treat this as an attack and
      will cause a system reset, with memory locked.  Not only may the subsequent
      memory scrub take some time, but the platform will be unable to enter the
      requested power state.
      
      This patch calls back into the tboot so that it may properly and securely clean
      up system state and clear the secrets-in-memory flag, after which it will place
      the system into the requested sleep state using ACPI information passed by the kernel.
      
       arch/x86/kernel/smpboot.c     |    2 ++
       drivers/acpi/acpica/hwsleep.c |    3 +++
       kernel/cpu.c                  |    7 ++++++-
       3 files changed, 11 insertions(+), 1 deletion(-)
      Signed-off-by: NJoseph Cihula <joseph.cihula@intel.com>
      Signed-off-by: NShane Wang <shane.wang@intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      86886e55
    • J
      x86, intel_txt: Intel TXT reboot/halt shutdown support · 840c2baf
      Joseph Cihula 提交于
      Support for graceful handling of kernel reboots after an Intel(R) TXT launch.
      
      Without this patch, attempting to reboot or halt the system will cause the
      TXT hardware to lock memory upon system restart because the secrets-in-memory
      flag that was set on launch was never cleared.  This will in turn cause BIOS
      to execute a TXT Authenticated Code Module (ACM) that will scrub all of memory
      and then unlock it.  Depending on the amount of memory in the system and its type,
      this may take some time.
      
      This patch creates a 1:1 address mapping to the tboot module and then calls back
      into tboot so that it may properly and securely clean up system state and clear
      the secrets-in-memory flag.  When it has completed these steps, the tboot module
      will reboot or halt the system.
      
       arch/x86/kernel/reboot.c |    8 ++++++++
       init/main.c              |    3 +++
       2 files changed, 11 insertions(+)
      Signed-off-by: NJoseph Cihula <joseph.cihula@intel.com>
      Signed-off-by: NShane Wang <shane.wang@intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      840c2baf
    • J
      x86, intel_txt: Intel TXT boot support · 31625340
      Joseph Cihula 提交于
      This patch adds kernel configuration and boot support for Intel Trusted
      Execution Technology (Intel TXT).
      
      Intel's technology for safer computing, Intel Trusted Execution
      Technology (Intel TXT), defines platform-level enhancements that
      provide the building blocks for creating trusted platforms.
      
      Intel TXT was formerly known by the code name LaGrande Technology (LT).
      
      Intel TXT in Brief:
      o  Provides dynamic root of trust for measurement (DRTM)
      o  Data protection in case of improper shutdown
      o  Measurement and verification of launched environment
      
      Intel TXT is part of the vPro(TM) brand and is also available some
      non-vPro systems.  It is currently available on desktop systems based on
      the Q35, X38, Q45, and Q43 Express chipsets (e.g. Dell Optiplex 755, HP
      dc7800, etc.) and mobile systems based on the GM45, PM45, and GS45
      Express chipsets.
      
      For more information, see http://www.intel.com/technology/security/.
      This site also has a link to the Intel TXT MLE Developers Manual, which
      has been updated for the new released platforms.
      
      A much more complete description of how these patches support TXT, how to
      configure a system for it, etc. is in the Documentation/intel_txt.txt file
      in this patch.
      
      This patch provides the TXT support routines for complete functionality,
      documentation for TXT support and for the changes to the boot_params structure,
      and boot detection of a TXT launch.  Attempts to shutdown (reboot, Sx) the system
      will result in platform resets; subsequent patches will support these shutdown modes
      properly.
      
       Documentation/intel_txt.txt      |  210 +++++++++++++++++++++
       Documentation/x86/zero-page.txt  |    1
       arch/x86/include/asm/bootparam.h |    3
       arch/x86/include/asm/fixmap.h    |    3
       arch/x86/include/asm/tboot.h     |  197 ++++++++++++++++++++
       arch/x86/kernel/Makefile         |    1
       arch/x86/kernel/setup.c          |    4
       arch/x86/kernel/tboot.c          |  379 +++++++++++++++++++++++++++++++++++++++
       security/Kconfig                 |   30 +++
       9 files changed, 827 insertions(+), 1 deletion(-)
      Signed-off-by: NJoseph Cihula <joseph.cihula@intel.com>
      Signed-off-by: NShane Wang <shane.wang@intel.com>
      Signed-off-by: NGang Wei <gang.wei@intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      31625340
  4. 21 7月, 2009 10 次提交
  5. 19 7月, 2009 2 次提交
    • L
      Merge master.kernel.org:/home/rmk/linux-2.6-arm · a7571a5c
      Linus Torvalds 提交于
      * master.kernel.org:/home/rmk/linux-2.6-arm:
        ARM: Realview & Versatile: Fix i2c_board_info definitions
        [ARM] 5608/1: Updated U300 defconfig
        [ARM] 5606/1: Fix ep93xx watchdog driver headers
        [ARM] 5594/1: Correct U300 VIC init PM setting
        [ARM] 5595/1: ep93xx: missing header in dma-m2p.c
        [ARM] Kirkwood: Correct header define
        [ARM] pxa: fix ULPI_{DIR,NXT,STP} MFP defines
        backlight: fix pwm_bl.c to notify platform code when suspending
        [ARM] pxa: use kzalloc() in pxa_init_gpio_chip()
        [ARM] pxa: correct I2CPWR clock for pxa3xx
        pxamci: correct DMA flow control
        ARM: add support for the EET board, based on the i.MX31 pcm037 module
        pcm037: add MT9T031 camera support
        Armadillo 500 add NAND flash device support (resend).
        ARM MXC: Armadillo 500 add NOR flash device support (resend).
        mx31: remove duplicated #include
      a7571a5c
    • R
      ARM: Realview & Versatile: Fix i2c_board_info definitions · 64e8be6e
      Russell King 提交于
      Fix i2c_board_info definitions - we were defining the 'type' field
      of these structures twice since the first argument of I2C_BOARD_INFO
      sets this field.  Move the second definition into I2C_BOARD_INFO().
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Acked-by: NJean Delvare <khali@linux-fr.org>
      Acked-by: NBen Dooks <ben-linux@fluff.org>
      64e8be6e
  6. 18 7月, 2009 8 次提交
  7. 17 7月, 2009 14 次提交