- 18 11月, 2009 1 次提交
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由 Troy Kisky 提交于
Remove requirement that dma_params is 1st in the structures davinci_audio_dev and davinci_mcbsp_dev. Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 30 9月, 2009 1 次提交
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由 Chaithrika U S 提交于
The DMA params for McASP with FIFO has been updated so that it works for various FIFO levels. A member- 'fifo_level' has been added to the DMA params data structure. The fifo_level can be adjusted by the tx[rx]_numevt platform data. This is relevant only for DA8xx/OMAP-L1xx platforms. This implementation has been tested for numevt values 1, 2, 4, 8. Signed-off-by: NChaithrika U S <chaithrika@ti.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 24 9月, 2009 2 次提交
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由 Chaithrika U S 提交于
McASP write FIFO registers should be modified for playback and read FIFO registers for capture. Check the PCM mode before manipulating the FIFO registers. Currently, irrespective of playback/capture both the FIFOs are enabled or disbaled. This resulted in errors in audio loopback mode. Signed-off-by: NChaithrika U S <chaithrika@ti.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Troy Kisky 提交于
This patch removes references to cpu_dai->dma_data. It makes struct davinci_pcm_dma_params part of struct davinci_mcbsp_dev or struct davinci_audio_dev. It removes the unused name variable from davinci_pcm_dma_params. Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 18 9月, 2009 1 次提交
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由 Chaithrika U S 提交于
McASP register settings are not correct for DSP mode of operation. There is a channel swap initally. This patch provides fixes to the register values for proper working. Tested on DA830/OMAP-L137 EVM, DM6467 EVM. Signed-off-by: NChaithrika U S <chaithrika@ti.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 14 8月, 2009 2 次提交
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由 Chaithrika U S 提交于
The patch adds a DAI format: Codec bit clock master and frame sync slave, to the driver. Signed-off-by: NChaithrika U S <chaithrika@ti.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Chaithrika U S 提交于
On DA830/OMAP-L137 and DA850/OMAP-L138 SoCs, the McASP peripheral has FIFO support. This FIFO provides additional data buffering. It also provides tolerance to variation in host/DMA controller response times. The read and write FIFO sizes are 256 bytes each. If FIFO is enabled, the DMA events from McASP are sent to the FIFO which in turn sends DMA requests to the host CPU according to the thresholds programmed. More details of the FIFO operation can be found at http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber= sprufm1&fileType=pdf This patch adds support for FIFO configuration. The platform data has a version field which differentiates the McASP on different SoCs. Signed-off-by: NChaithrika U S <chaithrika@ti.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 16 7月, 2009 1 次提交
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由 Kevin Hilman 提交于
clock name strings are no longer passed on platform_data. Instead, we rely entirely on struct device and clkdev to find the right clock. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 08 6月, 2009 1 次提交
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由 Chaithrika U S 提交于
Adds driver support for the two instances of McASP on TI's DM646x. The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for the needs of multichannel audio application. (http://www.ti.com/litv/pdf/spruer1b). There are two instances of McASP on DM646x. The McASP0 module includes up to 4 serializers that can be individually enabled to either transmit or receive in different modes. The McASP1 module is limited with only 1 pinned-out serializer that can be enabled to only transmit in DIT mode (neither receiving in any mode nor transmitting in either Burst or TDM mode is supported). McASP0 consists of transmit and receive sections that may operate synchronized, or completely independently with separate master clocks, bit clocks, and frame syncs, and using different transmit modes with different bit-stream formats. Signed-off-by: NSteve Chen <schen@mvista.com> Signed-off-by: NPavel Kiryukhin <pkiryukhin@ru.mvista.com> Signed-off-by: NNaresh Medisetty <naresh@ti.com> Signed-off-by: NChaithrika U S <chaithrika@ti.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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