1. 10 7月, 2014 1 次提交
  2. 18 6月, 2014 2 次提交
  3. 29 5月, 2014 1 次提交
  4. 12 5月, 2014 2 次提交
  5. 08 5月, 2014 1 次提交
    • A
      arm64: defer reloading a task's FPSIMD state to userland resume · 005f78cd
      Ard Biesheuvel 提交于
      If a task gets scheduled out and back in again and nothing has touched
      its FPSIMD state in the mean time, there is really no reason to reload
      it from memory. Similarly, repeated calls to kernel_neon_begin() and
      kernel_neon_end() will preserve and restore the FPSIMD state every time.
      
      This patch defers the FPSIMD state restore to the last possible moment,
      i.e., right before the task returns to userland. If a task does not return to
      userland at all (for any reason), the existing FPSIMD state is preserved
      and may be reused by the owning task if it gets scheduled in again on the
      same CPU.
      
      This patch adds two more functions to abstract away from straight FPSIMD
      register file saves and restores:
      - fpsimd_restore_current_state -> ensure current's FPSIMD state is loaded
      - fpsimd_flush_task_state -> invalidate live copies of a task's FPSIMD state
      Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      005f78cd
  6. 20 12月, 2013 1 次提交
    • W
      arm64: ptrace: avoid using HW_BREAKPOINT_EMPTY for disabled events · cdc27c27
      Will Deacon 提交于
      Commit 8f34a1da ("arm64: ptrace: use HW_BREAKPOINT_EMPTY type for
      disabled breakpoints") fixed an issue with GDB trying to zero breakpoint
      control registers. The problem there is that the arch hw_breakpoint code
      will attempt to create a (disabled), execute breakpoint of length 0.
      
      This will fail validation and report unexpected failure to GDB. To avoid
      this, we treated disabled breakpoints as HW_BREAKPOINT_EMPTY, but that
      seems to have broken with recent kernels, causing watchpoints to be
      treated as TYPE_INST in the core code and returning ENOSPC for any
      further breakpoints.
      
      This patch fixes the problem by prioritising the `enable' field of the
      breakpoint: if it is cleared, we simply update the perf_event_attr to
      indicate that the thing is disabled and don't bother changing either the
      type or the length. This reinforces the behaviour that the breakpoint
      control register is essentially read-only apart from the enable bit
      when disabling a breakpoint.
      
      Cc: <stable@vger.kernel.org>
      Reported-by: NAaron Liu <liucy214@gmail.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      cdc27c27
  7. 29 11月, 2013 1 次提交
  8. 12 6月, 2013 1 次提交
  9. 19 10月, 2012 2 次提交
  10. 11 10月, 2012 1 次提交
  11. 27 9月, 2012 1 次提交
  12. 17 9月, 2012 1 次提交