GENERIC_GPIO has been made equivalent to GPIOLIB in architecture code
and all driver code has been switch to depend on GPIOLIB. It is thus
safe to have GENERIC_GPIO removed.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>

This patch adds a dedicated dbg_show function to the gpio-mvebu driver.
In addition to the generic gpiolib informations, this function displays
informations related with the specific Marvell registers (blink enable,
data in polarity, interrupt masks and cause).
Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Move custom orion platforms gpio code to orion-gpio to remove the
dependency on mach/gpio.h.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>

Both IRQ and GPIO controllers can now be represented in DT.  The IRQ
controllers are setup first, and then the GPIO controllers. Interrupts
for GPIO lines are placed directly after the main interrupts in the
interrupt space.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@googlemail.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Tested-by: NJosh Coombs <josh.coombs@gmail.com>
Tested-by: NSimon Baatz <gmbnomis@gmail.com>

dns323 and (at least) iconnect platforms are using hw led blinking, so,
instead of having 2 identicals .gpio_blink_set gpio-led hooks, move
dns323 code into gpio.c
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Tested-By: NAdam Baker <linux@baker-net.org.uk>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

gpio registers are for 32 gpios. Given that orion_gpio_set_blink is called
directly and not through gpiolib, it needs to make sure that the pin value
given to the internal functions are between 0 and 31.
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Tested-By: NAdam Baker <linux@baker-net.org.uk>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The former implementation adds a fix gpiochip label string
to the framework. This is confusing because orion_gpio_init
is called more than once and this ends up in different gpiochips
with the same label.

This patch adds the already present orion_gpio_chip_count to the
label string to make it unique in the system.
Signed-off-by: NHolger Brunck <holger.brunck@keymile.com>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Acked-by: NNicolas Pitre <nico@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This fixes a regression introduced by e59347a1 "arm: orion:
Use generic irq chip".

Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.

Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().

For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.

Tested on Network Space v2.
Reported-by: NJoey Oravec <joravec@drewtech.com>
Signed-off-by: NSimon Guinot <sguinot@lacie.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The core interrupt chip is a straight forward conversion. The gpio
chip is implemented with two instances of the irq_chip_type which can
be switched with the irq_set_type function. That allows us to use the
generic callbacks and avoids the conditionals in them.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Use irq_set_chip_and_handler() instead. Converted with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Convert to the new function names. Automated with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Use the proper wrappers and use the flow type in irq_data.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This patch makes the various mach dirs that use the plat-orion GPIO
code pass in GPIO-related platform info (GPIO controller base address,
secondary base IRQ number, etc) explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Acked-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NErik Benada <erikbenada@yahoo.ca>

[ nico: fix locking, additional cleanups ]
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Especially on Kirkwood, a couple GPIOs are actually only output capable.
Let's separate the ability to configure a GPIO as input or output to
accommodate this restriction.
Signed-off-by: NNicolas Pitre <nico@marvell.com>

The GPIO interrupts can be configured as either level triggered or edge
triggered, with a default of level triggered.  When an edge triggered
interrupt is requested, the gpio_irq_set_type method is called which
currently switches the given IRQ descriptor between two struct irq_chip
instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This
happens via __setup_irq() which also calls irq_chip_set_defaults() to
assign default methods to uninitialized ones.  The problem is that
irq_chip_set_defaults() is called before the irq_chip reference is
switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this
case) with uninitialized methods such as chip->startup() causing a kernel
oops.

Many solutions are possible, such as making irq_chip_set_defaults() global
and calling it from gpio_irq_set_type(), or calling __irq_set_trigger()
before irq_chip_set_defaults() in __setup_irq().  But those require
modifications to the generic IRQ code which might have adverse effect on
other architectures, and that would still be a fragile arrangement.
Manually copying the missing methods from within gpio_irq_set_type()
would be really ugly and it would break again the day new methods with
automatic defaults are added.

A better solution is to have a single irq_chip instance which can deal
with both edge and level triggered interrupts.  It is also a good idea
to switch the IRQ handler instead, as the edge IRQ handler allows for
one edge IRQ event to be queued as the IRQ is actually masked only when
that second IRQ is received, at which point the hardware can queue an
additional IRQ event, making edge triggered interrupts a bit more
reliable.
Tested-by: NMartin Michlmayr <tbm@cyrius.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Split off Orion GPIO IRQ handling code into plat-orion/.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Split off Orion GPIO handling code into plat-orion/, and add
support for multiple sets of (32) GPIO pins.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>