- 11 10月, 2007 5 次提交
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This patch makes the SMC configuration take timings in clock cycles instead of nanoseconds. A function to calculate timings in clock cycles is added. This patch removes the rounding troubles of the previous SMC configuration method. [hskinnemoen@atmel.com: fix atstk1002/atngw100 flash config] Signed-off-by: NKristoffer Nyborg Gregertsen <gregerts@stud.ntnu.no> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Implement at32_add_device_usba() and use it to wire up the USBA device on ATSTK1000 and ATNGW100. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Matteo Vit 提交于
This patch add multidrive support for pio driver Signed-off-by: NMatteo Vit - Dave S.r.l. <matteo.vit@dave.eu> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 David Brownell 提交于
When debugfs is available, /sys/kernel/debug/at32ap_clk will provide a dump of the power manager registers and of the current clock tree. This can help sorting out various surprises, and when making runtime PM work. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
We don't want to redefine this in every file that needs to access the PM. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 19 7月, 2007 3 次提交
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由 Hans-Christian Egtvedt 提交于
This patch adds register definitions, clocks and IRQs to the platform devices. Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Hans-Christian Egtvedt 提交于
This patch enables CPU frequency scaling for AT32AP devices. This will enable the CPU to scale between the speed of the high speed bus and the master clock and thus save some power. The patch also adds a parent to cpu_clk and a cpu_clk_set_rate to enable changing the CPU clock divider in a sane way. The driver does not check if the given rate is 0, thus resulting in a div by 0. I think this check should be go into the clk_set_rate framework, and not here. Tested on AT32AP7000/ATSTK1000. Hardware documentation can be found in the AT32AP7000 datasheet. Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Split the SM platform device into separate platform devices for PM, RTC, WDT and EIC. This is more correct according to the documentation and allows us to simplify the code a little. Also turn the EIC driver into a real platform driver. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
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- 23 6月, 2007 1 次提交
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由 David Brownell 提交于
The current at32ap7000 platform devices aren't declared as supporting DMA, so that layered drivers can't tell whether they need to manage DMA. This patch makes all those platform devices report that they support DMA. Most do, but in a few cases this is inappropriate. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 15 5月, 2007 1 次提交
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由 Haavard Skinnemoen 提交于
This modifies and extends the existing lcdc platform code to support the new atmel_lcdfb driver. The ATSTK1000 board code is set up to use the on-board Samsung LTV350QV LCD panel. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 09 5月, 2007 1 次提交
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 27 4月, 2007 6 次提交
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由 Haavard Skinnemoen 提交于
Fix the I/O access macros so that they work with externally connected devices accessed in little-endian mode over any bus width: * Use a set of macros to define I/O port- and memory operations borrowed from MIPS. * Allow subarchitecture to specify address- and data-mangling * Implement at32ap-specific port mangling (with build-time configurable bus width. Only one bus width at a time supported for now.) * Rewrite iowriteN and friends to use write[bwl] and friends (not the __raw counterparts.) This has been tested using pata_pcmcia to access a CompactFlash card connected to the EBI (16-bit bus width.) Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Bring the code that sets the initial PM clock masks in line with the comment preceding it by only enabling clocks that have users != 0. Fix SM clock definition and avr32_hpt_init() so that the SM and TC0 clocks keep ticking. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Hans-Christian Egtvedt 提交于
Due to limitation of the count-compare system timer (not able to count when CPU is in sleep), the system timer had to be changed to use a peripheral timer/counter. The old COUNT-COMPARE code is still present in time.c as weak functions. The new timer is added to the architecture directory. This patch sets up TC0 as system timer The new timer has been tested on AT32AP7000/ATSTK1000 at 100 Hz, 250 Hz, 300 Hz and 1000 Hz. For more details about the timer/counter see the datasheet for AT32AP700x available at http://www.atmel.com/dyn/products/product_card.asp?part_id=3903Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Include at32ap-specific Kconfig file from top-level Kconfig file. The at32ap Kconfig is currently empty, but it will grow some machine- specific options soon. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Hans-Christian Egtvedt 提交于
Complete the SMC configuration code by adding nwait and tdf parameter. After this change, we support the same parameters as the hardware. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
This adds register and clock definitions for the High-speed bus Matrix (HMATRIX) as well as a function that can be used to configure special EBI functionality like CompactFlash and NAND flash support. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 17 3月, 2007 1 次提交
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由 David Brownell 提交于
It's been pointed out that output GPIOs should have an initial value, to avoid signal glitching ... among other things, it can be some time before a driver is ready. This patch corrects that oversight, fixing - documentation - platforms supporting the GPIO interface - users of that call (just one for now, others are pending) There's only one user of this call for now since most platforms are still using non-generic GPIO setup code, which in most cases already couples the initial value with its "set output mode" request. Note that most platforms are clear about the hardware letting the output value be set before the pin direction is changed, but the s3c241x docs are vague on that topic ... so those chips might not avoid the glitches. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Acked-by: NAndrew Victor <andrew@sanpeople.com> Acked-by: NMilan Svoboda <msvoboda@ra.rockwell.com> Acked-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 07 3月, 2007 1 次提交
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由 Haavard Skinnemoen 提交于
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 16 2月, 2007 3 次提交
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由 Haavard Skinnemoen 提交于
Set up one spi_board_info array per controller and pass this to at32_add_device_spi so that it can set up any GPIO pins for chip selects based on this information. Extracted from a patch by David Brownell and adapted slightly. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Print a helpful warning along with a stack dump if clk_disable is called on a already-disabled clock. Remove the BUG_ON(). Extracted from a patch by David Brownell. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Initialize the parent field of each generic clock by looking at the PM registers. This means that the genclock operations can always assume that the parent field is non-null, so they don't have to check. Also remove a few unnecessary BUG_ON()s. Extracted from a patch by David Brownell. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 09 2月, 2007 7 次提交
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由 Haavard Skinnemoen 提交于
Move stuff in spi.c into ATSTK1002 board code and update SPI platform device definitions according to the new GPIO API. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
The PIOE device was left out before because it muxes SDRAM pins (and is therefore a bit dangerous to mess with) and because no existing drivers had any use for it. It is needed for CompactFlash, however, and now that we have a way to protect the SDRAM pins, it can be safely added. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
at32_reserve_pin() can be used for reserving portmux pins without altering their configuration. Useful for e.g. SDRAM pins where we really don't want to change the bootloader-provided configuration. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Leave the PIO lines as the bootloader left them. This allows us to use PIOE without disturbing the SDRAM muxing. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Arch-neutral GPIO calls for AVR32. GPIO IRQ support written by David Brownell. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 David Brownell 提交于
Bugfixes for external irq handler set_irq_type(): - If set_irq_type() can't set the type, don't change anything! - It's not OK to change the flow handler as part of set_irq_type(), among other issues that violates spinlock rules. Instead, we can call the relevant handler when we demux the external interrupts. - The external irq demux has no need to grab the spinlock. And in fact grabbing it that way was wrong, since that code might be pre-empted by an irq at a different priority level, and that code might then have tried to grab that spinlock... Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 David Brownell 提交于
Fixes to USART setup on the stk-1000 ... don't configure USART 2, since its TXD/RXD are used for INT-A and INT-B buttons; and configure USART 0 (for IRDA, and with corrected IRQ) iff SW2 has a non-default setting. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 08 2月, 2007 1 次提交
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由 Andrew Victor 提交于
Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 08 12月, 2006 5 次提交
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由 Haavard Skinnemoen 提交于
intc_get_pending() returns a bitmask with pending interrupts in a interrupt controller group (irq). This is used by the upcoming oprofile implementation for avr32 and may also be useful for chained interrupt controller drivers. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Make sure that the flow handler for external interrupts is updated whenever they type is changed. Also make sure that the defaults correspond with how the interrupt controller is configured. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Remove arch/avr32/mach-at32ap/sm.c, which is not referenced by any Makefile. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Add platform_device definition and pio init code for the second ethernet controller in AT32AP7000. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Rename portmux_set_func to at32_select_periph, add at32_select_gpio and add flags parameter to specify the initial state of the pins. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 26 10月, 2006 1 次提交
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由 Haavard Skinnemoen 提交于
The read[bwl] and write[bwl] functions are meant for accessing PCI devices. How this is achieved on AVR32 is unknown, as there are no systems with a PCI bridge available yet. On-chip peripheral access, however, should not depend on how we end up implementing PCI access, so using __raw_read[bwl]/__raw_write[bwl] is the right thing to do for on-chip peripherals. This patch converts the drivers for the static memory controller, interrupt controller, PIO controller and system manager to use __raw MMIO access. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 12 10月, 2006 1 次提交
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由 Haavard Skinnemoen 提交于
Make the necessary changes to AVR32 required by the irq regs stuff. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 05 10月, 2006 3 次提交
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由 Haavard Skinnemoen 提交于
Allow the board to remap actual USART peripheral devices to serial devices by calling at32_map_usart(hw_id, serial_line). This ensures that even though ATSTK1002 uses USART1 as the first serial port, it will still have a ttyS0 device. This also adds a board-specific early setup hook and moves the at32_setup_serial_console() call there from the platform code. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Haavard Skinnemoen 提交于
In order to initialize the serial console early, the atmel_serial driver had to do a hack where it compared the physical address of the port with an address known to be permanently mapped, and used it as a virtual address. This got around the limitation that ioremap() isn't always available when the console is being initalized. This patch removes that hack and replaces it with a new "regs" field in struct atmel_uart_data that the board-specific code can initialize to a fixed virtual mapping for platform devices where this is possible. It also initializes the DBGU's regs field with the address the driver used to check against. On AVR32, the "regs" field is initialized from the physical base address when this it can be accessed through a permanently 1:1 mapped segment, i.e. the P4 segment. If regs is NULL, the console initialization is delayed until the "real" driver is up and running and ioremap() can be used. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Haavard Skinnemoen 提交于
Rename the following public definitions: * AT91_NR_UART -> ATMEL_MAX_UART * struct at91_uart_data -> struct atmel_uart_data * at91_default_console_device -> atmel_default_console_device Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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