Different revisions of CM-X300 use different pins for several functions.
Make the kernel aware of it.
Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Use .irqflags in the plat_serial8250_port structure to set IRQ
polarity, and get rid of the corresponding set_irq_type().
Signed-off-by: NMarc Zyngier <maz@misterjones.org>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NAntonio Ospite <ospite@studenti.unina.it>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NAntonio Ospite <ospite@studenti.unina.it>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NBart Visscher <bartv@thisnet.nl>
Signed-off-by: NAntonio Ospite <ospite@studenti.unina.it>
Acked-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Battery power levels are shared between spitz and corgi, rename
variable to reflect it.
Signed-off-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

This fixes checkpatch/style problems in sharpsl_pm.c, allowing me to
submit real fixes next.
Signed-off-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Because original macro can only judge whether current CPU is pxa93x,
rename the macro to correct name.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

CONFIG_CPU_PXA{300,310,320,930,935,950} are really platform dependent
and should be made into selectable hidden options.
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

MACH_COLIBRI300 is supposed to support both PXA300 and PXA310, select
the missing CPU_PXA310.
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
Acked-by: NDaniel Mack <daniel@caiaq.de>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

For some platforms, it is inappropriate to register all PXA UARTs.
In some cases, the UARTs may not be used, and in others we may want
to avoid registering the UARTs to allow other drivers (eg, FICP) to
make use of the UART.

In addition, a while back there was a request to be able to pass
platform data to the UART driver.

This patch enables all of this by providing functions platforms can
call to register each individual UART.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: NMike Rapoport <mike@compulab.co.il>
Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

This should be eventually moved to somewhere closer to the U2D driver,
but is kept here atm so it's easier for USB configuration code to work.
Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Due to the naming mess in Kconfig and Makefile, I'd like to get them sorted
in the following order:

 1. By category:
    Intel/Marvell Dev Platforms, followed by 3rd party platforms, followed
    by end-user products (this is to ensure the commonly referenced platforms
    will appear first)

 2. By vendor name in alphabetic within each category
    (this is to ensure code reuse and similar platforms can be grouped as
     much as possible)

	   VENDOR        BOARD
	Intel/Marvell   Lubbock
	Intel/Marvell   Mainstone
	Intel/Marvell   Zylonite
	Intel/Marvell   Littleton
	Intel/Marvell   TavorEVB
	Intel/Marvell   SAAR

	Accelent        IDP
	Arcom/Eurotech  VIPER
	Community       Balloon3
	Cogent          CSB726
	CompuLab        EM_X270
	CompuLab        EXEDA
	CompuLab        ARMCORE
	CompuLab        CM_X300
	Gumstix         Gumstix
	Intel Research  MOTE2
	Intel research  Stargate2
	Iskratel        XCEP
	Keith and Koep  Trizeps4
	LogicPD         LPD270
	Phytec          PCM027
	Toradex         Colibri

	HP              HX4700
	HP              H5000
	HTC             Himalaya
	HTC             Magician
	Mitac           MioA701
	Motorola        EZX
	NEC             MP900C
	Palm            Palm PDA
	Palm            Palm GSM
	Sharp           Zaurus
	Toshiba         E-Series
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NTomáš Čech <sleep_walker@suse.cz>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NTomáš Čech <sleep_walker@suse.cz>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Since flash structure is changed from flash_platform_data to
onenand_platform_data in generic driver. Update the struct in saar
and ttc platform driver.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Since the same nand controller is shared between ARCH_PXA and ARCH_MMP. Move
the pxa3xx_nand.h from mach directory to plat directoy.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Cc: David Woodhouse <david.woodhouse@intel.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

MTD_NAND_PXA3xx module is shared between ARCH_PXA and ARCH_MMP. Update
this configuration according to it.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Support samsung 2GbX8 and 32GbX8 nand flash.
Support micron 4GbX8 and 4GbX16 nand flash.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

In some bootloader, IRQ is enabled. Writing nand triggers unexpected
interrupts. So disable nand irq in initialization. After nand
initialized and in working state, irq is controlled by nand driver.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Nand driver uses IRQ_NAND as hardcode irq number. In ARCH_MMP, the irq
number is different. So get irq resource from platform device structure
and use it in initialization and deinitialization code.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Although nand controller is same between PXA3xx and MMP, the register space
is different. Remove the hardcode register address setting in pxa3xx_nand.h.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Slow down the tRp of Micron NAND flash timing.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Initialize the read buffer content to 0xFF.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

When fetch nand data with non-DMA mode, we should align info->data_size to
32bit, not 8bit.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Set default WLED output current in saar. Otherwise, LCD backlight won't be
effective.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Update WLED output current source before changing brightness.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Some SPI host drivers do not change chip select betwen transfers unless
.cs_chnage field is explicitly set. The LCD spec requires chip select
change between consecuitive transfers, so ensure it at the SPI driver
level.
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Along with more processor supporting 26MHz mode (including pxa935),
introduce an individual macro mmc_has_26mhz() for this.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

fb_var_screeninfo.var has already encoded this information.
Signed-off-by: NJun Nie <njun@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>