I2C designware controller can run at fast mode plus and high speed. This
patch adds the capability to get the HCNT, LCNT configuration via
FPCN (fast plus) and HSCN (high speed) ACPI method.
Signed-off-by: NWeifeng Voon <weifeng.voon@intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

I2c designware controller operate speed is configured in the register
IC_CON. Previously the operate speed is determined by a local variable
clk_freq. This patch will move the local variable clk_freq into struct
dw_i2c_dev. This change will ease the set and get of the clk_freq.
Signed-off-by: NWeifeng Voon <weifeng.voon@intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

On some platforms, such as Intel Medfield, the I2C slave devices are enumerated
through SFI tables where bus numbering is expected to be defined in the OS.
Make the bus number allocation robust for such platforms.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The per adapter bus_lock already projects from concurrent calls to the
master_xfer callback. No need to add a driver internal lock.

Also, rephrase a comment to drop mention of this lock.
Reported-by: Rongrong Zou <zourongrong@gmail.com>
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Because of some hardware limitation, AMD I2C controller can't
trigger pending interrupt if interrupt status has been changed
after clearing interrupt status bits. Then, I2C will lost
interrupt and IO timeout.

According to hardware design, this patch implements a workaround
to disable i2c controller interrupt and re-enable i2c interrupt
before exiting ISR.

To reduce the performance impacts on other vendors, use unlikely
function to check flag in ISR.
Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org

There is some code duplication in i2c-designware-platdrv and
i2c-designware-pcidrv probe functions. What is even worse that duplication
requires i2c_dw_xfer(), i2c_dw_func() and i2c_dw_isr() i2c-designware-core
functions to be exported.

Therefore move common code into new i2c_dw_probe() and make functions above
local to i2c-designware-core.

While merging the code patch does following functional changes:

- I2C Adapter name will be "Synopsys DesignWare I2C adapter". Previously it
  was used for platform and ACPI devices but PCI device used
  "i2c-designware-pci".
- Using device name for interrupt name. Previous it was platform device name,
  ACPI device name or "i2c-designware-pci".
- Error code from devm_request_irq() and i2c_add_numbered_adapter() will be
  printed in case of error.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

dw_readl() and dw_writel() are not used outside of i2c-designware-core and
they are not exported so make them static and remove their forward
declaration.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

i2c_dw_is_enabled() became unused by the commit be58eda7
("i2c: designware-pci: Cleanup driver power management") and
i2c_dw_enable() by the commit 3a48d1c0 ("i2c: prevent spurious
interrupt on Designware controllers").
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

There is no need to clear interrupts in i2c_dw_pci_probe() since only place
where interrupts are unmasked is i2c_dw_xfer_init() and there interrupts
are always cleared after commit 2a2d95e9 ("i2c: designware: always
clear interrupts before enabling them").

This allows to cleanup the code and replace i2c_dw_clear_int() in
i2c_dw_xfer_init() by direct register read as there are no other callers.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC.

On these platforms access to the PMIC must be shared with platform hardware. The
hardware unit assumes full control of the I2C bus and the host must request
access through a special semaphore. Hardware control of the bus also makes it
necessary to disable runtime pm to avoid interfering with hardware transactions.
Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Adds support for acquiring and releasing a hardware bus lock in the i2c
designware core transfer function. This is needed for i2c bus controllers
that are shared with but not controlled by the kernel.
Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

We have a central copy of the GPL for that. Some addresses were already
outdated.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>

This patch allows to set independantly SCL and SDA falling times.
The tLOW period is computed by taking into account the SCL falling time.
The tHIGH period is computed by taking into account the SDA falling time.

For instance in case the margin on tLOW is considered too small, it can
be increased by increasing the SCL falling time which is by default set
at 300ns.

The same applies for tHIGH period with the help of SDA falling time.
Signed-off-by: NRomain Baeriswyl <romainba@abilis.com>
Reviewed-by: NChristian Ruppert <christian.ruppert@abilis.com>
Acked-by: NShinya Kuribayashi <skuribay@pobox.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The DesignWare I2C controller has high count (HCNT) and low count (LCNT)
registers for each of the I2C speed modes (standard and fast). These
registers are programmed based on the input clock speed in the driver.

The current code calculates these values based on the input clock speed and
tries hard to meet the I2C bus timing requirements. This could result
non-optimal values with regarding to the bus speed. For example on Intel
BayTrail we get bus speed of 315.41kHz which is ~20% slower than we would
expect (400kHz) in fast mode (even though the timing requirements are met).

This patch makes it possible for the platform code to pass more optimal
HCNT/LCNT values to the core driver if they are known beforehand. If these
are not set we use the calculated and more conservative values.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: NShinya Kuribayashi <skuribay@pobox.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch makes the SDA hold time configurable through device tree.
Signed-off-by: NChristian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: NPierrick Hascoet <pierrick.hascoet@abilis.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

i2c_dw_xfer_msg() pushes a number of bytes to transmit/receive
to/from the bus into the TX FIFO.
For master-rx transactions, the maximum amount of data that can be
received is calculated depending solely on TX and RX FIFO load.

This is racy - TX FIFO may contain master-rx data yet to be
processed, which will eventually land into the RX FIFO. This
data is not taken into account and the function may request more
data than the controller is actually capable of storing.

This patch ensures the driver takes into account the outstanding
master-rx data in TX FIFO to prevent RX FIFO overrun.
Signed-off-by: NJosef Ahmad <josef.ahmad@linux.intel.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org

The STM SPEAr platform can only access the i2c controller register
via 16bit read/write functions. This patch adds support to
automatically detect this 16bit access mode.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>

Add runtime power management to the PCI driver.
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Move all register manipulation code into the core, also move register
offset definitions to i2c-designware-core.c since the bus specific
portions of the driver no longer need/use them.
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

With multiple I2C adapters possible in the system each running at
(possibly) different speeds we need to move the controller
configuration bit field to the adapter.
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The functionality of the adapter depends on the configuration of the
IP block at silicon compile time and is adapter specific.
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The clock frequecy supplied to the IP core is specific to a single
instance of the driver.  This patch makes it possible to have multiple
Designware I2C cores in the system possibly running at different core
frequencies.
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

This patch splits i2c-designware.c into three pieces:
     i2c-designware-core.c, contains the code that interacts directly
     with the core.

     i2c-designware-platdrv.c, contains the code specific to the
     platform driver using the core.

     i2c-designware-core.h contains the definitions and declareations
     shared by i2c-designware-core.c and i2c-designware-platdrv.c.

This patch is the first in a set to allow multiple instances of the
designware I2C core in the system.
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>