- 13 10月, 2012 2 次提交
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Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Instead of check the pointer of the init function, check the new builtin bool to known if the soc is enabled. This is needed as with the switch to the pinctrl the init will be NULL on pure DT SoC. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 12 9月, 2012 3 次提交
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由 Ludovic Desroches 提交于
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NNikolaus Voss <n.voss@weinmann.de> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
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由 Nikolaus Voss 提交于
This driver has the following properties compared to the old driver: 1. Support for multiple interfaces. 2. Interrupt driven I/O as opposed to polling/busy waiting. 3. Support for _one_ repeated start (Sr) condition, which is enough for most real-world applications including all SMBus transfer types. (The hardware does not support issuing arbitrary Sr conditions on the bus.) testing: SoC: at91sam9g45 - BQ20Z80 battery SMBus client. - on a 2.6.38 kernel with several i2c clients (temp-sensor, audio-codec, touchscreen-controller, w1-bridge, io-expanders) Signed-off-by: NNikolaus Voss <n.voss@weinmann.de> Reviewed-by: NFelipe Balbi <balbi@ti.com> Tested-by: NHubert Feurstein <h.feurstein@gmail.com> Tested-by: NLudovic Desroches <ludovic.desroches@atmel.com> Reviewed-by: NNicolas Ferre <nicolas.ferre@atmel.com> [wsa: squashed with the following patches from Ludovic to have some flaws fixed: i2c: at91: use managed resources i2c: at91: add warning about transmission issues for some devices i2c: at91: use an id table for SoC dependent parameters ] Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
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由 Nikolaus Voss 提交于
The old driver used con_id clock entries. Convert to use dev_id for clock lookup via standard method. Signed-off-by: NNikolaus Voss <n.voss@weinmann.de> Tested-by: NLudovic Desroches <ludovic.desroches@atmel.com> Reviewed-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
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- 02 7月, 2012 1 次提交
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由 Ludovic Desroches 提交于
Enable sparse irq support for multisoc image. It involves to add the NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY irq descs are allocated before AIC requests irq descs allocation. Move NR_AIC_IRQS macro to a more appropiate place with the purpose to remove mach/irqs.h later. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 15 5月, 2012 1 次提交
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由 Maxime Ripard 提交于
This patch adds platform data for the AT91 ADC driver support for the AT91SAM9G20-EK board. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 17 4月, 2012 1 次提交
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at91_set_serial_console is used to define the default console of linux. This is already manage by the cmdline. And if the boot loader can not be modified you can still set it by enabling the CONFIG_CMDLINE_EXTEND option. And then the command-line arguments provided by the boot loader will be appended to the default kernel command string. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 29 3月, 2012 1 次提交
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由 David Howells 提交于
Disintegrate asm/system.h for ARM. Signed-off-by: NDavid Howells <dhowells@redhat.com> cc: Russell King <linux@arm.linux.org.uk> cc: linux-arm-kernel@lists.infradead.org
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- 16 3月, 2012 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: devicetree-discuss@lists.ozlabs.org
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- 01 3月, 2012 1 次提交
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由 Nicolas Ferre 提交于
Device tree support added to atmel_tclib: the generic Timer Counter library. This is used by the clocksource/clockevent driver tcb_clksrc. The current DT enabled platforms are also modified to use it: - .dtsi files are modified to add Timer Counter Block entries - alias are created to allow identification of each block - clkdev lookup tables are added for clocks identification. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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- 23 2月, 2012 3 次提交
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On at91sam9260 and at91sam9g20 the SRAM banks are mirrored. We can merge them together to be able to have bigger and continuous internal RAM. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRyan Mallon <rmallon@gmail.com> Cc: linux-usb@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 18 2月, 2012 1 次提交
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Remove duplicated at91sam9xxxx_idle() functions introduced by commit c9dfafba "ARM: mach-at91: move special idle code out of line". Replace by a generic at91sam9_idle() function in setup.c common location. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 21 1月, 2012 2 次提交
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由 Nicolas Pitre 提交于
... and hook it to arm_pm_idle. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 05 1月, 2012 1 次提交
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由 Russell King 提交于
Rather than using a private function pointer, use the existing arm_pm_restart function pointer instead. We no longer need to enable the I-cache in at91sam9_alt_reset() as the caches will now be on when this function is called. Update the function names to use the 'restart' terminology rather than the 'reboot' terminology. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 12月, 2011 1 次提交
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The conid is supposed to be t0/t1/t2_clk. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org>
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- 29 11月, 2011 2 次提交
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this will simplify the switch to the DT and later to the platform_device Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
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- 28 11月, 2011 5 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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now sam9_smc_configure will take as first parameter is the SMC id Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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this will allow to ioremap the register of the PIT, PMC and others and make the code soc independent Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRyan Mallon <rmallon@gmail.com>
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- 22 11月, 2011 1 次提交
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由 Jamie Iles 提交于
The macb driver expects clocks with the names "pclk" and "hclk". We currently provide "macb_clk" but to fit in line with other architectures (namely AVR32), provide "pclk" and a fake "hclk". Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NDavid S. Miller <davem@davemloft.net> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 25 10月, 2011 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com>
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- 11 9月, 2011 1 次提交
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Remove the cpu_is_at91xxxx() macros in the ohci-at91 driver. SoCs at91sam9261 and at91sam9g10 expect one additional clock: hck0. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 28 7月, 2011 7 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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to make the soc base specified at runtime instead of compiled time Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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they are the same except the default priority Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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- 25 5月, 2011 2 次提交
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we do not change the clock naming convention so does not need to switch the AVR32 yet Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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switch early init to init_early and introduce soc map_io with this Patch we will not do any more early device setup during the map io tks to Russell to point the new call back Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NAndrew Victor <linux@maxim.org.za>
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- 26 10月, 2010 2 次提交
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由 Nicolas Ferre 提交于
Several at91sam9 chips need the alternate reset procedure to be sure to halt SDRAM smoothly before resetting the chip. This is an extension of previous patch "Fix AT91SAM9G20 reset" to all chips affected. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Generalize assembler reset routine to allow use on several at91sam9 chips. This patch replace double definitions of SDRAM controller registers and RSTC registers with use of classical header files. For this rework, we remove the not needed icache flush as it is already done in the calling function: arm_machine_restart(). Rename at91sam9g20_reset.S to generalize to several chips. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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