- 13 5月, 2012 6 次提交
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由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Rename arch/arm/mach-mxs/include/mach/mmc.h to include/linux/mmc/mxs-mmc.h, so that mxs-mmc driver becomes <mach/*> inclusion free. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NChris Ball <cjb@laptop.org>
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由 Shawn Guo 提交于
The register HW_SSP_VERSION is broken for ssp version detection, as the address of the register is different between imx23 and imx28. Let's use platform_device_id to detect the device, so that the use of cpu_is_xxx can be removed. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NChris Ball <cjb@laptop.org>
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- 12 5月, 2012 9 次提交
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由 Shawn Guo 提交于
It adds gpio support for device tree boot. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Shawn Guo 提交于
It removes the use of cpu_is_xxx from gpio-mxs driver and instead use platform_device_id to identify the device. Accordingly, mxs platform code is changed to register gpio device with different names, and the registeration are done in soc specific initialization functions now, so postcore_initcall(mxs_add_mxs_gpio) gets removed. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dong Aisheng 提交于
Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Huang Shijie <b32955@freescale.com> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NVinod Koul <vinod.koul@intel.com>
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由 Dong Aisheng 提交于
This will cause conflict when dt is enabled. So let each platform add dma devices respectively. Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Huang Shijie <b32955@freescale.com> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NVinod Koul <vinod.koul@intel.com>
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由 Shawn Guo 提交于
Rewrite mxs_dma_is_apbh and mxs_dma_is_apbx in order to support other SoCs like imx6q and reform the platform_device_id for the better further dt support. Cc: Dan Williams <dan.j.williams@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Huang Shijie <b32955@freescale.com> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NVinod Koul <vinod.koul@intel.com>
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由 Shawn Guo 提交于
As the ultimate for mxs platform is to convert over to device tree, let's start always building in device tree support for the platform. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMarek Vasut <marex@denx.de>
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由 Shawn Guo 提交于
It adds initial device tree support for imx23-evk board, and only serial console is enabled. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMarek Vasut <marex@denx.de>
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由 Dong Aisheng 提交于
This patch includes basic dt support which can boot via nfs rootfs. Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMarek Vasut <marex@denx.de>
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由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 09 5月, 2012 5 次提交
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由 Shawn Guo 提交于
With old mxs clock support removed, the timer_clk argument of mxs_timer_init is unused now, so remove it. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
The mxs clock has been switched to common clock framework, so the old clock support can be removed now. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
It switches mxs clock support to common clk framework based drivers. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
Change the fec phy clock lookup name to be more accurate. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
When mxs_timer_init() does not have a timer_clk passed in, it should try to request clock from clkdev system. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 08 5月, 2012 3 次提交
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由 Dong Aisheng 提交于
Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
The mxs pinctrl driver will only support DT probe. That said, the mxs device drivers can only get pinctrl state from pinctrl subsystem when the drivers get probed from device tree. Before converting the whole mxs platform support over to device tree, we need to enable pinctrl dummy states for those non-DT board files to ensure the pinctrl API adopted by mxs device drivers will work for both DT and non-DT probe. Instead of calling pinctrl_provide_dummies() directly in every board file, the patch introduces soc specific calls mx23_soc_init() and mx28_soc_init() for boards' .init_machine hook to invoke, so that any soc specific setup for non-DT boot only can be added there. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Dong Aisheng 提交于
Enable pinctrl dummy states for imx platforms without pinctrl support. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 28 4月, 2012 4 次提交
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由 Will Deacon 提交于
When a CPU is hotplugged off, we migrate any IRQs currently affine to it away and onto another online CPU by calling the irq_set_affinity function of the relevant interrupt controller chip. This function returns either IRQ_SET_MASK_OK or IRQ_SET_MASK_OK_NOCOPY, to indicate whether irq_data.affinity was updated. If we are forcefully migrating an interrupt (because the affinity mask no longer identifies any online CPUs) then we should update the IRQ affinity mask to reflect the new CPU set. Failure to do so can potentially leave /proc/irq/n/smp_affinity identifying only offline CPUs, which may confuse userspace IRQ balancing daemons. This patch updates migrate_one_irq to copy the affinity mask when the interrupt chip returns IRQ_SET_MASK_OK after forcefully changing the affinity of an interrupt. Cc: stable@vger.kernel.org Reported-by: NLeif Lindholm <leif.lindholm@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
When performing a kexec on an SMP system, the secondary cores are stopped by calling machine_shutdown(), which in turn issues IPIs to offline the other CPUs. Unfortunately, this isn't enough to reboot the cores into a new kernel (since they are just executing a cpu_relax loop somewhere in memory) so we make use of platform_cpu_kill, part of the CPU hotplug implementation, to place the cores somewhere safe. This function expects to be called on the killing CPU for each core that it takes out. This patch moves the platform_cpu_kill callback out of the IPI handler and into smp_send_stop, therefore ensuring that it executes on the killing CPU rather than on the victim, matching what the hotplug code requires. Cc: stable@vger.kernel.org Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
TPIDRURW is a user read/write register forming part of the group of thread registers in more recent versions of the ARM architecture (~v6+). Currently, the kernel does not touch this register, which allows tasks to communicate covertly by reading and writing to the register without context-switching affecting its contents. This patch clears TPIDRURW when TPIDRURO is updated via the set_tls macro, which is called directly from __switch_to. Since the current behaviour makes the register useless to userspace as far as thread pointers are concerned, simply clearing the register (rather than saving and restoring it) will not cause any problems to userspace. Cc: stable@vger.kernel.org Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Stephen Boyd 提交于
WARNING: vmlinux.o(.text+0x111b8): Section mismatch in reference from the function arm_memory_present() to the function .init.text:memory_present() The function arm_memory_present() references the function __init memory_present(). This is often because arm_memory_present lacks a __init annotation or the annotation of memory_present is wrong. WARNING: arch/arm/mm/built-in.o(.text+0x1edc): Section mismatch in reference from the function alloc_init_pud() to the function .init.text:alloc_init_section() The function alloc_init_pud() references the function __init alloc_init_section(). This is often because alloc_init_pud lacks a __init annotation or the annotation of alloc_init_section is wrong. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 4月, 2012 4 次提交
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由 Igor Grinberg 提交于
Pins configured as input and have MFP_LPM_DRIVE_* flag set, can have a wrong output value for some period of time (spike) during the suspend sequence. This can happen because the direction of the pins (GPDR) is set by software and the output level is set by hardware (PGSR) at a later stage. Fix the above potential bug by setting the output levels first. Also save the actual levels of the pins before the suspend and restore them after the resume, but before the direction settings take place, so the same bug as described above will not happen in the resume sequence. Reported-by: NPaul Parsons <lost.distance@yahoo.com> Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Tested-by: NPaul Parsons <lost.distance@yahoo.com> Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
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由 Igor Grinberg 提交于
Pins that have MFP_LPM_KEEP_OUTPUT set and are configured for output must retain the output state in low power mode. Currently, the pin direction configuration is overrided with values in gpdr_lpm[] array and do not obey the MFP_LPM_KEEP_OUTPUT setting. Fix the above bug and add some documentation to clarify the MFP_LPM_KEEP_OUTPUT setting purpose. Reported-by: NPaul Parsons <lost.distance@yahoo.com> Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Tested-by: NPaul Parsons <lost.distance@yahoo.com> Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
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由 Dmitry Artamonow 提交于
DEFINE_RES_MEM() takes the size of resource as a second argument, not the end address. Passing end address leads to following error in runtime during device registration: sa1100-rtc: failed to claim resource 0 Fix it. Signed-off-by: NDmitry Artamonow <mad_soft@inbox.ru> Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
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由 Robert Jarzmik 提交于
In 3.3, gpio wakeup setting was broken. The call enable_irq_wake() didn't set up the PXA gpio registers (PWER, ...) anymore. Fix it at least for pxa27x. The driver doesn't seem to be used in pxa25x (weird ...), and the fix doesn't extend to pxa3xx and pxa95x (which don't have a gpio_set_wake() available). Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
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- 26 4月, 2012 1 次提交
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由 Vasiliy Kulikov 提交于
Don't allow everybody to use a modem. Signed-off-by: NVasiliy Kulikov <segoon@openwall.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 25 4月, 2012 5 次提交
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由 Marek Szyprowski 提交于
Commit 6e8201f5 "mmc: core: add the capability for broken voltage" introduced a new quirk to indicate that MMC core should ignore voltage change errors reported by the regulators core. This is required to get SDHCI working on UniversalC210, NURI and GONI boards again after commit ceb6143b ("mmc: sdhci: fix vmmc handling"). Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tushar Behera 提交于
Fixed following compile time error. arch/arm/mach-exynos/common.c: In function 'exynos5_init_irq': arch/arm/mach-exynos/common.c:539:2: error: implicit declaration of function 'of_irq_init' arch/arm/mach-exynos/common.c:539:14: error: 'exynos4_dt_irq_match' undeclared (first use in this function) arch/arm/mach-exynos/common.c:539:14: note: each undeclared identifier is reported only once for each function it appears in Cc: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NTushar Behera <tushar.behera@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
Should be EXYNOS4_IRQ_DWMCI instead of IRQ_DWMCI, and use DEFINE_RES_{MEM,IRQ}. Reported-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
warning: (CPU_S3C2440 && CPU_S3C2442) selects S3C2410_PM which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410) warning: (CPU_S3C2440 && CPU_S3C2442) selects S3C2410_PM which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410) Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Arnd Bergmann 提交于
This is needed to fix mini2440_defconfig after the platform files have been moved around. arm-none-linux-gnueabi-ld: no machine record defined arm-none-linux-gnueabi-ld: no machine record defined arm-none-linux-gnueabi-ld: no machine record defined make: *** [.tmp_vmlinux1] Error 1 Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 24 4月, 2012 1 次提交
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由 David Brown 提交于
As of commit 75294957 Author: Grant Likely <grant.likely@secretlab.ca> Date: Tue Feb 14 14:06:57 2012 -0700 irq_domain: Remove 'new' irq_domain in favour of the ppc one the ARM gic controller uses proper irq domains. Fix the MSM gic initialization and DT so that it works again. Signed-off-by: NDavid Brown <davidb@codeaurora.org> Acked-by: NGrant Likely <grant.likely@secretlab.ca>
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- 23 4月, 2012 2 次提交
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由 Russell King 提交于
Using coherent DMA memory with the OMAP DMA engine results in unpredictable behaviour due to memory ordering issues; as things stand, there is no guarantee that data written to coherent DMA memory will be visible to the DMA hardware. This is because the OMAP dma_write() accessor contains no barriers, necessary on ARMv6 and above. The effect of this can be seen in comments in the OMAP serial driver, which incorrectly talks about cache flushing for the coherent DMA stuff. Rather than adding barriers to the accessors, add it in the DMA support code just before we enable DMA, and just after we disable DMA. This avoids having barriers for every DMA register access. Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Linus Walleij 提交于
The MMCI driver will not work without two IRQs since this is not flagged as a single-irq variant. Looking through the complex IRQ definition for the MMCI on the versatile (including an #if 1 statement forcing MMCI IRQ0 to the VIC) this appears to the the correct IRQ number for both models. Cc: Niklas Hernaeus <niklas.hernaeus@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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