1. 09 2月, 2010 7 次提交
  2. 08 1月, 2010 2 次提交
  3. 06 1月, 2010 1 次提交
  4. 23 12月, 2009 2 次提交
  5. 10 12月, 2009 1 次提交
  6. 09 12月, 2009 2 次提交
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  10. 06 11月, 2009 3 次提交
  11. 28 10月, 2009 1 次提交
    • A
      drm/radeon/kms/atom: loosen pll min output limits · 8f552a66
      Alex Deucher 提交于
      Limiting the pll output range is a good thing generally as
      it limits the number of possible pll combinations for a given
      frequency presumably to the ones that work best on each card.
      That's why the limits are in the bios tables. However, certain
      duallink DVI monitors seem to like pll combinations that would
      be limited by this at least on pre-DCE 3.0 r6xx hardware.  This
      might need to be adjusted per family or per clock range in the
      future.
      
      See fdo bug 24727.
      Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      8f552a66
  12. 26 10月, 2009 2 次提交
  13. 12 10月, 2009 2 次提交
  14. 25 9月, 2009 1 次提交
  15. 18 9月, 2009 1 次提交
    • D
      drm/radeon/kms: add initial connector properties · 445282db
      Dave Airlie 提交于
      This adds:
      coherent mode: TMDS coherent mode for atom cards.
      scaling mode: LVDS scaler mode
      load detect: DAC load detection, DVI-I, VGA, TV
      tmds pll: legacy TMDS pll selection
      tv standard: TV standard selection.
      
      for later: other TV ones? dvi subconnector selection using std prop
      
      [contains fixes pointed out on dri-devel for atom bios mixups
       by Michel]
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      445282db
  16. 16 9月, 2009 1 次提交
  17. 12 9月, 2009 1 次提交
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  19. 08 9月, 2009 2 次提交
  20. 15 7月, 2009 1 次提交
  21. 19 6月, 2009 1 次提交