MIPS R6 redefines several instructions and reduces the immediate
field to 9-bits so add related macros for the microassembler.
Signed-off-by: NLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>

New instructions for Extended Physical Addressing (XPA) functionality.
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8453/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/7120/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by the SLT instruction.
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7119/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6736/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6733/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6732/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6731/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6730/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6728/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6727/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Fixed conflict due to other preceeding conflicts.]
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6726/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by bpf-jit

[ralf@linux-mips.org: Fixed conflict with
49e9529b [MIPS: uasm: add jalr instruction].
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6725/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It will be used later on by the sllv and srlv instructions.
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6723/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch allows use of the MT ASE yield instruction from uasm. It will
be used by a subsequent patch.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>

This patch allows use of the wait instruction from uasm. It will be used
by a subsequent patch.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>

This patch allows use of the sync instruction from uasm. It will be used
by a subsequent patch.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>

This patch allows use of the jalr instruction from uasm. It will be used
by a subsequent patch.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>

This patch allows for use of the beq instruction with labels from uasm,
much as bne & others already do. It will be used by a subsequent patch.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>

commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.

The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files.  MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.

[1] https://lkml.org/lkml/2013/5/20/589

[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Split 'uasm.c' into two files. The new file 'uasm-mips.c' has the
functions specific to the classic MIPS ISA. The 'uasm.c' file
contains common code that can be used by classic or other ISAs
that could be supported by the kernel.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: kevink@paralogos.com
Cc: ddaney.cavm@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/4922/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
(cherry picked from commit 0961103562ab958fa74f35043bf4f72e51ed6155)

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

These are MIPS32R2 instructions for merging and extracting bit fields
from one GPR into another.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>

A number of new instructions have been added to the micro assembler causing
the list to no longer be in alphabetical order. This patch fixes up the name
ordering.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3789/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

On the off chance that uasm ever warns about overflow, there is no way
to know what the offending instruction is.

Change the printks to WARNs, so we can get a nice stack trace.  It has
the added benefit of being much more noticeable than the short single
line warning message, so is less likely to be ignored.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1905/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Needed by Octeon II optimized TLB handlers.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Pachwork: https://patchwork.linux-mips.org/patch/1903/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1875/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The CN63XXP1 needs a couple of workarounds to ensure memory is not written
in unexpected ways.

All PREF with hints in the range 0-4,6-24 are replaced with PREF 28.  We
pass a flag to the assembler to cover compiler generated code, and patch
uasm for the dynamically generated code.

The write buffer threshold is reduced to 4.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1672/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

A 'select EXPORT_UASM' in Kconfig will cause the uasm to be exported
for use in modules.  When it is exported, all the uasm data and code
cease to be __init and __initdata.

Also daddiu_bug cannot be __cpuinitdata if uasm is exported.  The
cleanest thing is to just make it normal data.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: wim@iguana.be
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1500/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

These are OCTEON specific instructions.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: wim@iguana.be
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1496/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: wim@iguana.be
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1495/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This is needed for the fix of the M3 workaround.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/976/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and
ROTR support in uasm.  We also add a UASM_i_ROTR macro.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/953/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/887/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The following routines

uasm_rel_highest()
uasm_rel_higher()

are needlessly defined global. This patch makes them static.

Compile-tested using a customized config for the Malta board. Booting
the same board up to the shell prompt was also successful with this
patch applied.

Spotted by sparse.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Fold the SB-1 specific implementation of clear_page/copy_page in the
generic version, and rewrite that one in tlbex style. The immediate
benefits:
  - It converts the compile-time workaround for SB-1 pass 1 prefetches
    to a more efficient run-time check.
  - It allows adjustment of loop unfolling, which helps to reduce the
    number of redundant cdex cache ops.
  - It fixes some esoteric cornercases (the cache line length calculations
    can go wrong, and support for 64k pages without prefetch instructions
    will overflow the addiu immediate).
  - Somewhat better guesses of "good" prefetch values.
Signed-off-by: NThiemo Seufer <ths@networkno.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>