1. 10 5月, 2012 1 次提交
  2. 29 3月, 2012 1 次提交
  3. 13 1月, 2011 1 次提交
  4. 26 10月, 2010 1 次提交
    • P
      sh: Expose physical addressing mode through cpuinfo. · 2f98492c
      Paul Mundt 提交于
      CPUs can be in either the legacy 29-bit or 32-bit physical addressing
      modes. This follows the x86 approach of tracking the phys bits in cpuinfo
      and exposing it to userspace through procfs.
      
      This change was requested to permit kexec-tools to detect the physical
      addressing mode in order to determine the appropriate address mangling.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      2f98492c
  5. 26 4月, 2010 1 次提交
  6. 21 4月, 2010 2 次提交
  7. 23 2月, 2010 1 次提交
    • P
      sh: wire up SET/GET_UNALIGN_CTL. · 94ea5e44
      Paul Mundt 提交于
      This hooks up the SET/GET_UNALIGN_CTL knobs cribbing the bulk of it from
      the PPC and ia64 implementations. The thread flags happen to be the
      logical inverse of what the global fault mode is set to, so this works
      out pretty cleanly. By default the global fault mode is used, with tasks
      now being able to override their own settings via prctl().
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      94ea5e44
  8. 19 1月, 2010 1 次提交
  9. 18 1月, 2010 1 次提交
  10. 21 8月, 2009 1 次提交
  11. 15 8月, 2009 1 次提交
    • P
      sh: Track the CPU family in sh_cpuinfo. · e82da214
      Paul Mundt 提交于
      This adds a family member to struct sh_cpuinfo, which allows us to fall
      back more on the probe routines to work out what sort of subtype we are
      running on. This will be used by the CPU cache initialization code in
      order to first do family-level initialization, followed by subtype-level
      optimizations.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      e82da214
  12. 11 6月, 2009 1 次提交
    • M
      sh: rework mode pin code · 0d4fdbb6
      Magnus Damm 提交于
      This patch reworks the mode pin code to keep the pin
      definitions in one place. The mode pins values are now
      the value of the bit instead of bit number.
      
      With this patch in place the sh7785 header file contains
      mode pin comments. The sh7785 clock code and the sh7785lcr
      board code are updated to reflect the new shared mode pins.
      Signed-off-by: NMagnus Damm <damm@igel.co.jp>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      0d4fdbb6
  13. 01 6月, 2009 1 次提交
    • M
      sh: boot word / mode pin support V2 · eb9b9b56
      Magnus Damm 提交于
      Add mode pin support for the SuperH architecture V2.
      
      With this patch applied the board code can add their
      own function to export the cpu mode pin configuration.
      In most cases this will be a constant bitmap, but
      boards that allow reading this from a register can
      instead read out the pin state from hardware.
      
      The code warns if a pin is tested but no board specific
      mode pin function has been provided.
      Signed-off-by: NMagnus Damm <damm@igel.co.jp>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      eb9b9b56
  14. 16 4月, 2009 1 次提交
  15. 03 3月, 2009 1 次提交
  16. 22 12月, 2008 2 次提交
  17. 17 9月, 2008 1 次提交
  18. 08 9月, 2008 1 次提交
  19. 29 7月, 2008 1 次提交
  20. 28 7月, 2008 1 次提交
  21. 19 4月, 2008 2 次提交
  22. 26 3月, 2008 1 次提交
  23. 14 2月, 2008 1 次提交
  24. 28 1月, 2008 9 次提交
  25. 07 11月, 2007 1 次提交
    • P
      sh: Kill off the remaining ST40 cruft. · f9669187
      Paul Mundt 提交于
      The ST40 stuff in-tree hasn't built for some time, and hasn't been
      updated for over 3 years. ST maintains their own out-of-tree changes
      and rebases occasionally, and that's ultimately where all of the ST40
      users go anyways.
      
      In order for the ST40 code to be brought up to date most of the stuff
      removed in this changeset would have to be rewritten anyways, so there's
      very little benefit in keeping the remnants around either.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      f9669187
  26. 30 10月, 2007 1 次提交
  27. 27 9月, 2007 2 次提交
  28. 21 9月, 2007 1 次提交