1. 11 6月, 2009 1 次提交
  2. 09 3月, 2009 1 次提交
  3. 09 9月, 2008 1 次提交
  4. 07 8月, 2008 2 次提交
  5. 09 5月, 2008 1 次提交
  6. 04 5月, 2008 1 次提交
  7. 24 4月, 2008 1 次提交
  8. 26 1月, 2008 1 次提交
  9. 19 10月, 2007 1 次提交
  10. 21 7月, 2007 1 次提交
    • E
      [ARM] 4488/1: pxa: move pxa25x/pxa27x specific code out of pm.c · 711be5cc
      Eric Miao 提交于
      1. introduce a structure pxa_cpu_pm_fns for pxa25x/pxa27x specific
         operations as follows:
      
      	struct pxa_cpu_pm_fns {
      		int	save_size;
      		void	(*save)(unsigned long *);
      		void	(*restore)(unsigned long *);
      		int	(*valid)(suspend_state_t state);
      		void	(*enter)(suspend_state_t state);
      	}
      
      2. processor specific registers saving and restoring are performed
         by calling the corresponding (*save) and (*restore)
      
      3. pxa_cpu_pm_fns->save_size should be initialized to the required
         size for processor specific registers saving, the allocated
         memory address will be passed to (*save) and (*restore)
      
         memory allocation happens early in pxa_pm_init(), and save_size
         should be assigned prior to this (which is usually true, since
         pxa_pm_init() happens in device_initcall()
      
      4. there're some redundancies for those SLEEP_SAVE_XXX and related
         macros, will be fixed later, one way possible is for the system
         devices to handle the specific registers saving and restoring
      Signed-off-by: Neric miao <eric.y.miao@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      711be5cc
  11. 12 7月, 2007 3 次提交
  12. 01 5月, 2007 2 次提交
    • J
      power management: implement pm_ops.valid for everybody · e8c9c502
      Johannes Berg 提交于
      Almost all users of pm_ops only support mem sleep, don't check in .valid and
      don't reject any others in .prepare so users can be confused if they check
      /sys/power/state, especially when new states are added (these would then
      result in s-t-r although they're supposed to be something different).
      
      This patch implements a generic pm_valid_only_mem function that is then
      exported for users and puts it to use in almost all existing pm_ops.
      Signed-off-by: NJohannes Berg <johannes@sipsolutions.net>
      Cc: David Brownell <david-b@pacbell.net>
      Acked-by: NPavel Machek <pavel@ucw.cz>
      Cc: linux-pm@lists.linux-foundation.org
      Cc: Len Brown <lenb@kernel.org>
      Acked-by: NRussell King <rmk@arm.linux.org.uk>
      Cc: Greg KH <greg@kroah.com>
      Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      e8c9c502
    • J
      rework pm_ops pm_disk_mode, kill misuse · fe0c935a
      Johannes Berg 提交于
      This patch series cleans up some misconceptions about pm_ops.  Some users of
      the pm_ops structure attempt to use it to stop the user from entering suspend
      to disk, this, however, is not possible since the user can always use
      "shutdown" in /sys/power/disk and then the pm_ops are never invoked.  Also,
      platforms that don't support suspend to disk simply should not allow
      configuring SOFTWARE_SUSPEND (read the help text on it, it only selects
      suspend to disk and nothing else, all the other stuff depends on PM).
      
      The pm_ops structure is actually intended to provide a way to enter
      platform-defined sleep states (currently supported states are "standby" and
      "mem" (suspend to ram)) and additionally (if SOFTWARE_SUSPEND is configured)
      allows a platform to support a platform specific way to enter low-power mode
      once everything has been saved to disk.  This is currently only used by ACPI
      (S4).
      
      This patch:
      
      The pm_ops.pm_disk_mode is used in totally bogus ways since nobody really
      seems to understand what it actually does.
      
      This patch clarifies the pm_disk_mode description.
      
      It also removes all the arm and sh users that think they can veto suspend to
      disk via pm_ops; not so since the user can always do echo shutdown >
      /sys/power/disk, they need to find a better way involving Kconfig or such.
      
      ACPI is the only user left with a non-zero pm_disk_mode.
      
      The patch also sets the default mode to shutdown again, but when a new pm_ops
      is registered its pm_disk_mode is selected as default, that way the default
      stays for ACPI where it is apparently required.
      Signed-off-by: NJohannes Berg <johannes@sipsolutions.net>
      Cc: David Brownell <david-b@pacbell.net>
      Acked-by: NPavel Machek <pavel@ucw.cz>
      Cc: <linux-pm@lists.linux-foundation.org>
      Cc: Len Brown <lenb@kernel.org>
      Acked-by: NRussell King <rmk@arm.linux.org.uk>
      Cc: Greg KH <greg@kroah.com>
      Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
      Acked-by: NPaul Mundt <lethal@linux-sh.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      fe0c935a
  13. 04 12月, 2006 1 次提交
    • L
      [ARM] 3881/4: xscale: clean up cp0/cp1 handling · afe4b25e
      Lennert Buytenhek 提交于
      XScale cores either have a DSP coprocessor (which contains a single
      40 bit accumulator register), or an iWMMXt coprocessor (which contains
      eight 64 bit registers.)
      
      Because of the small amount of state in the DSP coprocessor, access to
      the DSP coprocessor (CP0) is always enabled, and DSP context switching
      is done unconditionally on every task switch.  Access to the iWMMXt
      coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is
      first issued, and iWMMXt context switching is done lazily.
      
      CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will
      have iWMMXt support', but boards are supposed to select this config
      symbol by hand, and at least one pxa27x board doesn't get this right,
      so on that board, proc-xscale.S will incorrectly assume that we have a
      DSP coprocessor, enable CP0 on boot, and we will then only save the
      first iWMMXt register (wR0) on context switches, which is Bad.
      
      This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on
      might have iWMMXt support, and we will enable iWMMXt context switching
      if it does.'  This means that with this patch, running a CONFIG_IWMMXT=n
      kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt
      state over context switches, and running a CONFIG_IWMMXT=y kernel on a
      non-iWMMXt capable CPU will still do DSP context save/restore.
      
      These changes should make iWMMXt work on PXA3xx, and as a side effect,
      enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such
      as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined),
      as well as setting and using HWCAP_IWMMXT properly.
      Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
      Acked-by: NDan Williams <dan.j.williams@intel.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      afe4b25e
  14. 01 7月, 2006 1 次提交
  15. 13 12月, 2005 1 次提交
    • L
      [ARM] 3201/1: PXA27x: Prevent hangup during resume due to inadvertedly... · 1ee9530a
      Lothar Wassmann 提交于
      [ARM] 3201/1: PXA27x: Prevent hangup during resume due to inadvertedly enabling MBREQ (replaces: 3198/1)
      
      Patch from Lothar Wassmann
      
      The patch makes sure, that the ouptut functions of pins are restored
      before restoring the Alternat Function settings, preventing pins from
      being intermediately configured for undefined or unwanted alternate
      functions.
      
      Here is the original comment:
      I've got a PXA270 system that uses GPIO80 as nCS4. This system did
      hang on resume. Digging into the problem I found that the processor
      stalled immediately when restoring the GAFR2_U register which restored
      the alternate function for GPIO80. Since the GPDR registers were
      restored after the GAFR registers, the offending GPIO was configured
      as input at this point.
      Thus the alternate function that was in effect after restoring the
      GAFR was in fact the input function "MBREQ" instead of the output
      function "nCS4". The "PXA27x Processor Family Developer's Manual"
      (Footnote in Table 6-1 on page 6-3) states that:
      "The MBREQ alternate function must not be enabled until the PSSR[RDH]
      bit field is cleared. For more details, see Table 3-15, "PSSR Bit
      Definitions" on page 3-71."
      
      There is another note in the Developer's Manual (chapter 24.4.2
      "GPIO operation as Alternate Function" on page 24-4)
      stating that:
      "Configuring a GPIO for an alternate function that is not defined for
      it causes unpredictable results."
      
      Since some GPIOs have no input function defined, and to prevent
      inadvertedly programming the MBREQ function on some pin, the GAFR
      registers should be restored after the GPDR registers have been
      restored.
      
      Additional provisions have to be made when the MBREQ function is
      actually required. The corresponding GAFR bits should not be restored
      with the regular GAFR restore, but must be set only after the PSSR
      bits have been cleared.
      Signed-off-by: NLothar Wassmann <LW@KARO-electronics.de>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      1ee9530a
  16. 06 11月, 2005 1 次提交
  17. 20 6月, 2005 1 次提交
  18. 04 6月, 2005 1 次提交
    • T
      [PATCH] ARM: 2691/1: PXA27x sleep fixes take 2 · 8775420d
      Todd Poynor 提交于
      Patch from Todd Poynor
      
      PXA27x sleep fixes:
      * set additional sleep/wakeup registers for Mainstone boards.
      * move CKEN=0 to pxa25x-specific code; that value is harmful on pxa27x.
      * save/restore additional registers, including some found necessary for
      C5 processors and/or newer blob versions.
      * enable future support of additional sleep modes for PXA27x (eg,
      standby, deep sleep).
      * split off cpu-specific sleep processing between pxa27x and pxa25x into
      separate files (partly in preparation for additional sleep modes).
      Includes fixes from David Burrage.
      
      Signed-off-by: Todd Poynor
      Signed-off-by: Nicolas Pitre
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8775420d
  19. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4