Ensure continued operation with DAPM being mandatory.
Signed-off-by: NMark Brown <broonie@linaro.org>

Provide a common compatible string for device trees to list as a fallback
for simplicity. We don't currently have a binding document but let's not
fix that right now...
Signed-off-by: NMark Brown <broonie@linaro.org>

CS42L52 Beep control uses 2dB scale from -56dB
Signed-off-by: NBrian Austin <brian.austin@cirrus.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Beep Volume Min/Max was backwards.
Change to SOC_SONGLE_SX_TLV for correct volume representation
Signed-off-by: NBrian Austin <brian.austin@cirrus.com>
Signed-off-by: NMark Brown <broonie@linaro.org>
Cc: stable@kernel.org

The SGTL5000 Capture Attenuate Switch (or "ADC Volume Range Reduction"
as it is called in the manual) is single bit only.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

When a sound capture/playback is terminated while a playback/capture
is running, power_vag_event() will clear SGTL5000_CHIP_ANA_POWER in
the SND_SOC_DAPM_PRE_PMD event, thus muting the respective other
channel.

Don't clear SGTL5000_CHIP_ANA_POWER when both DAC and ADC are active
to prevent this.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

If kzalloc() fails for `img' then we are going to leak the memory
for `out'.  We are freeing the memory of all the tx/rx transfers
but the tx/rx buf pointers will be NULL if we drop out earlier.
Signed-off-by: NDimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

It's not always the case that clock is already available when sgtl5000
get probed at the first time, e.g. the clock is provided by CPU DAI
which may be probed after sgtl5000.  So let's defer the probe when
devm_clk_get() call fails and give it chance to try later.

It fixes the regression on imx28 since commit 9e13f345 (ASoC: sgtl5000:
Let the codec acquire its clock).

[    1.927637] sgtl5000 0-000a: Failed to get mclock: -2
[    1.934280] sgtl5000: probe of 0-000a failed with error -2
[    1.945906] mxs-sgtl5000 sound.13: ASoC: CODEC (null) not registered
[    1.953787] mxs-sgtl5000 sound.13: snd_soc_register_card failed (-517)
[    1.960865] platform sound.13: Driver mxs-sgtl5000 requests probe deferral
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

The registers of max98088 are 8 bits, not 16 bits. This bug causes the
contents of registers to be overwritten with bad values when the codec
is suspended and then resumed.
Signed-off-by: NChih-Chung Chang <chihchung@chromium.org>
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NMark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org

wm8978 needs .symmetric_rates = 1.
The playback/capture will be strange without this patch
when it used asymmetric rate in same time
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

This was committed in error.
Signed-off-by: NMark Brown <broonie@linaro.org>

SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of
register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range.
Reported-by: NOskar Schirmer <oskar@scara.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org

According to the sgtl5000 reference manual, the default value of CHIP_SSS_CTRL
is 0x10.
Reported-by: NOskar Schirmer <oskar@scara.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NMark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org

There is an error in merge commit 384b8345 on conflict resolution which
causes the following NULL pdata pointer bug.

wm8962 0-001a: customer id 0 revision D
Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = 80004000
[00000004] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0+ #1
task: bf870000 ti: bf874000 task.ti: bf874000
PC is at wm8962_probe+0x134/0x6c8
LR is at regmap_unlock_mutex+0x10/0x14
pc : [<80452100>]    lr : [<80304cf4>]    psr: a0000113
sp : bf875c98  ip : 00000000  fp : bf875cd4
r10: 00000000  r9 : bfb1830c  r8 : 80779bc4
r7 : 00000000  r6 : 00000001  r5 : bfbac010  r4 : bfb33e00
r3 : 80304ce4  r2 : 00000000  r1 : 00000001  r0 : fffffffb
Flags: NzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c53c7d  Table: 1000404a  DAC: 00000017
Process swapper/0 (pid: 1, stack limit = 0xbf874238)
Stack: (0xbf875c98 to 0xbf876000)
...

Fix the error by assigning pdata a correct pointer.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

spacr64 gcc-3.4.5 (at least) spits this back.

Cc: Andrey Smirnov <andrey.smirnov@convergeddevices.net>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Takashi Iwai <tiwai@suse.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

codec->control_data has to be left unset to make the ASoC core access
the regmap properly.

That bug slipped in during a rebase session of the driver refactoring.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Replace calls to snd_soc_update_bits() with regmap_update_bits().
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

It turns out that the TAS5086 doesn't like channel start parts to be
empty, and if all channels are configured to Mid-Z, part 1 has to be
used.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

The TAS5086_CLOCK_CONTROL also has a size of 1 byte.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Currently we can only have a single platform built in with AC'97 support
due to the use of a global variable to provide the bus operations. Fix
this by making that variable a pointer and having the bus drivers set the
operations prior to registering.

This is not a particularly good or nice approach but it avoids blocking
multiplatform and a real fix involves fixing the fairly deep problems
with AC'97 support - we should be converting it to a real bus.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

There's no content in the announcement.
Signed-off-by: NMark Brown <broonie@linaro.org>

There's no content in the announcement.
Signed-off-by: NMark Brown <broonie@linaro.org>

There is no need to have versioning beyond that for the kernel, especially
when the version number never gets updated.
Signed-off-by: NMark Brown <broonie@linaro.org>

The ADAU1701 has 12 pins that can be configured depending on the system
configuration. Allow settting the corresponding registers from DT.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

The hardware I/O has to be open-coded due to registers of unequal sizes.
Other than that, the transition is straight forward.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

The ADAU1701 has 2 hardware pins to configure the PLL mode in accordance
to the MCLK-to-LRCLK ratio. These pins have to be stable before the chip
is released from reset, and a full reset cycle, including a new firmware
download is needed whenever they change.

This patch adds GPIO properties to the DT bindings of the Codec, and
implements makes the set_sysclk memorize the configured sysclk.

Because the run-time parameters are unknown at probe time, the first
firmware download is postponed to the first hw_params call, when the
driver can determine the mclk/lrclk divider. Subsequent downloads
are only issued when the divider configuration changes.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

The chip needs a new download after each reset, so the code to do that
needs to live in adau1701_reset().
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

The TAS5086 has two alternative modes to start its PWM channels, Mid-Z
and Low-Z. Which one to use depends on how the PWM power stages are
connected to the TAS5086.

This patch adds 6 optional boolean properties to the DT bindings of the
driver which allow the user to configure each individual channel to the
Mid-Z scheme, and leaves all the others to the default (Low-Z).
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

The TAS5086 has two muxes, one for connecting I2S inputs to internal
channels, and another one for selecting which internal channel should
be routed to which PWM output pin.

This patch adds DAPM widgets and routes for this driver.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Add register definitions for input and output mux registers, and rewrite
the tas5086_accessible_reg() function.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

In order to support registers of unequal sizes, the I2C I/O has to be
open-coded.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

To reduce pop noise during playback stream start and stop the codec needs
to have the digital_mute callback implemented.
The codec need to be muted before the CPU dai has been stopped (McPDM).
Stopping the McPDM will generate a pop on the codec since no signal on the
PDM bus means full negative amplitude.
By managing the mute/unmute state of the outputs we can decrease the amount
of pop noise when playback starts or stops.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Later we can identify the DAIs by this ID number.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

We need to free the irq at twl6040_remove() which is called when the machine
driver has been removed (the card has been removed).
If we fail to do that, next time when the machine driver is loaded the
codec's probe will fail since the irq has been already requested.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@linaro.org>