- 26 1月, 2017 3 次提交
-
-
由 Bhumika Goyal 提交于
Declare dev_pm_ops structures as const as they are only stored in the pm field of a device_driver structure. This field is of type const, so dev_pm_ops structures having similar properties can be declared const too. Signed-off-by: NBhumika Goyal <bhumirks@gmail.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Grzegorz Jaszczyk 提交于
This commit implements suspend/resume support in the mv64xxx I2C controller driver. There is no need to implement a ->suspend() hook, as calling mv64xxx_i2c_hw_init() at ->resume() time is enough. Signed-off-by: NGrzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: NNadav Haklai <nadavh@marvell.com> Reviewed-by: NLior Amsalem <alior@marvell.com> Tested-by: NLior Amsalem <alior@marvell.com> [Thomas: switch to dev_pm_ops, fix build warning when !PM.] Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 M'boumba Cedric Madianga 提交于
This patch adds support for the STM32F4 I2C controller. Signed-off-by: NM'boumba Cedric Madianga <cedric.madianga@gmail.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 13 1月, 2017 1 次提交
-
-
由 Ricardo Ribalda 提交于
On AMD's SB800 and upwards, the SMBus is shared with the Integrated Micro Controller (IMC). The platform provides a hardware semaphore to avoid race conditions among them. (Check page 288 of the SB800-Series Southbridges Register Reference Guide http://support.amd.com/TechDocs/45482.pdf) Without this patch, many access to the SMBus end with an invalid transaction or even with the bus stalled. Reported-by: NAlexandre Desnoyers <alex@qtec.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>: Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 18 12月, 2016 3 次提交
-
-
由 Tin Huynh 提交于
ACPI always sets Tx/Rx FIFO to 32. This configuration will cause problem if the IP core supports a FIFO size of less than 32. The driver should read the FIFO size from the IP and select the smaller one of the two. Signed-off-by: NTin Huynh <tnhuynh@apm.com> Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Tin Huynh 提交于
In DTB case, i2c-core doesn't create slave device which is installed on i2c-xgene bus because of missing code in this driver. This patch fixes this issue. Signed-off-by: NTin Huynh <tnhuynh@apm.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Jan Glauber 提交于
Do not infinitely retry register readq and writeq operations in order to not lock up the CPU in case the TWSI gets stuck. Return -EIO in case of a failed data read. For all other cases just return so subsequent operations will fail and trigger the recovery. Signed-off-by: NJan Glauber <jglauber@cavium.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 12 12月, 2016 6 次提交
-
-
由 Gao Pan 提交于
The lpi2c fifo size is a read only parameter resides Parameter Register. It's better to read lpi2c tx/rx fifo size in probe() other than just define a macro for it. Signed-off-by: NGao Pan <pandy.gao@nxp.com> Reviewed-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Jan Glauber 提交于
Commit 1bb1ff3e ("i2c: octeon: Improve performance if interrupt is early") added a double-check around the wait_event_timeout() condition. The performance problem that this commit tried to work-around could not be reproduced. It also makes the wait condition more complicated then it should be. Therefore remove the double-check. Signed-off-by: NJan Glauber <jglauber@cavium.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Jan Glauber 提交于
I've seen i2c recovery reporting long loops of: [ 1035.887818] i2c i2c-4: SCL is stuck low, exit recovery [ 1037.999748] i2c i2c-4: SCL is stuck low, exit recovery [ 1040.111694] i2c i2c-4: SCL is stuck low, exit recovery ... Add a TWSI software reset which clears the status and STA,STP,IFLG in SW_TWSI_EOP_TWSI_CTL. With this the recovery works fine and above message is not seen. Signed-off-by: NJan Glauber <jglauber@cavium.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Jan Kotas 提交于
This patch allows Cadence I2C controller to be selected in systems using Cadence Xtensa processors. Signed-off-by: NJan Kotas <jank@cadence.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Simon Horman 提交于
Add per-Generation fallback bindings for R-Car SoCs. This is in keeping with the compatibility string scheme is being adopted for drivers for Renesas SoCs. Also, improve readability by listing the rmobile fallback compatibility string after the more-specific compatibility strings they provide a fallback for. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Simon Horman 提交于
In the case of Renesas R-Car hardware we know that there are generations of SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the relationship between IP blocks might be. For example, I believe that r8a7790 is older than r8a7791 but that doesn't imply that the latter is a descendant of the former or vice versa. We can, however, by examining the documentation and behaviour of the hardware at run-time observe that the current driver implementation appears to be compatible with the IP blocks on SoCs within a given generation. For the above reasons and convenience when enabling new SoCs a per-generation fallback compatibility string scheme is being adopted for drivers for Renesas SoCs. Also: * Deprecate renesas,i2c-rcar. It seems poorly named as it is only compatible with R-Car Gen 1. It also appears unused in mainline. * Add some text to describe per-SoC bindings Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 02 12月, 2016 4 次提交
-
-
由 Gao Pan 提交于
This patch adds lpi2c bus driver to support new i.MX products which use lpi2c instead of the old imx i2c. The lpi2c can continue operating in stop mode when an appropriate clock is available. It is also designed for low CPU overhead with DMA offloading of FIFO register accesses. Signed-off-by: NGao Pan <pandy.gao@nxp.com> Reviewed-by: NFugang Duan <B38611@freescale.com> Reviewed-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Alexander Stein 提交于
Both Merrifield TRM and Medfield TRM state: "Both 7-bit and 10-bit addressing modes are supported." Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com> Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Romain Perier 提交于
The Armada 3700 has two I2C controllers that is compliant with the I2C Bus Specificiation 2.1, supports multi-master and different bus speed: Standard mode (up to 100 KHz), Fast mode (up to 400 KHz), High speed mode (up to 3.4 Mhz). This IP block has a lot of similarity with the PXA, except some register offsets and bitfield. This commits adds a basic support for this I2C unit. Signed-off-by: NRomain Perier <romain.perier@free-electrons.com> Tested-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Romain Perier 提交于
So far, the bit masks for the fast and high speed mode were statically defined. Some IP blocks might use different bits for these modes. This commit introduces new fields in order to enable the definition of different bit masks for these features. If these fields are undefined, ICR_FM and ICR_HS are selected to preserve backward compatibility with other IPs. Signed-off-by: NRomain Perier <romain.perier@free-electrons.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 30 11月, 2016 4 次提交
-
-
由 Naveen Kaje 提交于
I2C QUP driver relies on SMBus emulation support from the framework. To handle SMBus block reads, the driver should check I2C_M_RECV_LEN flag and should read the first byte received as the message length. The driver configures the QUP hardware to read one byte. Once the message length is known from this byte, the QUP hardware is configured to read the rest. Signed-off-by: NNaveen Kaje <nkaje@codeaurora.org> Signed-off-by: NAustin Christ <austinwc@codeaurora.org> Reviewed-by: NSricharan R <sricharan@codeaurora.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Naveen Kaje 提交于
Add support to get the device parameters from ACPI. Assume that the clocks are managed by firmware. Signed-off-by: NNaveen Kaje <nkaje@codeaurora.org> Signed-off-by: NAustin Christ <austinwc@codeaurora.org> Reviewed-by: NSricharan R <sricharan@codeaurora.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Alexander Stein 提交于
Use a common place for default functionality bits for both platform and pci driver. Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com> Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Jan Glauber 提交于
This reverts commit 70121f7f ("i2c: octeon: thunderx: Limit register access retries"). Using readq_poll_timeout instead of __raw_readq triggers the following debug warning: [ 78.871568] ipmi_ssif: Trying hotmod-specified SSIF interface at i2c address 0x12, adapter Cavium ThunderX i2c adapter at 0000:01:09.4, slave address 0x0 [ 78.886107] do not call blocking ops when !TASK_RUNNING; state=2 set at [<fffffc00080e0088>] prepare_to_wait_event+0x58/0x10c [ 78.897436] ------------[ cut here ]------------ [ 78.902050] WARNING: CPU: 6 PID: 2235 at kernel/sched/core.c:7718 __might_sleep+0x80/0x88 [...] [ 79.133553] [<fffffc00080c3aac>] __might_sleep+0x80/0x88 [ 79.138862] [<fffffc0000e30138>] octeon_i2c_test_iflg+0x4c/0xbc [i2c_thunderx] [ 79.146077] [<fffffc0000e30958>] octeon_i2c_test_ready+0x18/0x70 [i2c_thunderx] [ 79.153379] [<fffffc0000e30b04>] octeon_i2c_wait+0x154/0x1a4 [i2c_thunderx] [ 79.160334] [<fffffc0000e310bc>] octeon_i2c_xfer+0xf4/0xf60 [i2c_thunderx] Signed-off-by: NJan Glauber <jglauber@cavium.com> Acked-by: NSteven J. Hill <steven.hill@cavium.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 26 11月, 2016 1 次提交
-
-
由 Jarkko Nikula 提交于
This reverts commit 0317e6c0. Srinivas reported recently touchscreen and touchpad stopped working in Haswell based machine in Linux 4.9-rc series with timeout errors from i2c_designware: [ 16.508013] i2c_designware INT33C3:00: controller timed out [ 16.508302] i2c_hid i2c-MSFT0001:02: failed to change power setting. [ 17.532016] i2c_designware INT33C3:00: controller timed out [ 18.556022] i2c_designware INT33C3:00: controller timed out [ 18.556315] i2c_hid i2c-ATML1000:00: failed to retrieve report from device. I managed to reproduce similar errors on another Haswell based machine where touchscreen initialization fails maybe in every 1/5 - 1/2 boots. Since root cause for these errors is not clear yet and debugging is ongoing it's better to revert this commit as we are near to release. Reported-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 24 11月, 2016 9 次提交
-
-
由 Benjamin Tissoires 提交于
The current SMBus Host Notify implementation relies on .alert() to relay its notifications. However, the use cases where SMBus Host Notify is needed currently is to signal data ready on touchpads. This is closer to an IRQ than a custom API through .alert(). Given that the 2 touchpad manufacturers (Synaptics and Elan) that use SMBus Host Notify don't put any data in the SMBus payload, the concept actually matches one to one. Benefits are multiple: - simpler code and API: the client will just have an IRQ, and nothing needs to be added in the adapter beside internally enabling it. - no more specific workqueue, the threading is handled by IRQ core directly (when required) - no more races when removing the device (the drivers are already required to disable irq on remove) - simpler handling for drivers: use plain regular IRQs - no more dependency on i2c-smbus for i2c-i801 (and any other adapter) - the IRQ domain is created automatically when the adapter exports the Host Notify capability - the IRQ are assign only if ACPI, OF and the caller did not assign one already - the domain is automatically destroyed on remove - fewer lines of code (minus 20, yeah!) Signed-off-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Benjamin Tissoires 提交于
On the platform tested, reading SMBNTFDDAT always returns 0 (using 1 read of a word or 2 of 2 bytes). Given that we are not sure why and that we don't need to rely on the data parameter in the current users of Host Notify, remove this part of the code. If someone wants to re-enable it, just revert this commit and data should be available. Signed-off-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Benjamin Tissoires 提交于
no functional changes Signed-off-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Benjamin Tissoires 提交于
i801 mixes hexadecimal and decimal values for defining bits. However, we have a nice BIT() macro for this exact purpose. No functional changes, cleanup only. Reviewed-by: NJean Delvare <jdelvare@suse.de> Signed-off-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Benjamin Tissoires 提交于
No functional changes, just typos and remove unused #define. Reviewed-by: NJean Delvare <jdelvare@suse.de> Signed-off-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Benjamin Tissoires 提交于
Also do not override any other configuration in this register. Signed-off-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Vadim Pasternak 提交于
Device driver for Mellanox I2C controller logic, implemented in Lattice CPLD device. Device supports: - Master mode - One physical bus - Polling mode The Kconfig currently controlling compilation of this code is: drivers/i2c/busses/Kconfig:config I2C_MLXCPLD Signed-off-by: NMichael Shych <michaelsh@mellanox.com> Signed-off-by: NVadim Pasternak <vadimp@mellanox.com> Reviewed-by: NJiri Pirko <jiri@mellanox.com> Reviewed-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Russell King 提交于
When loading the TX fifo to receive bytes on the I2C bus, we incorrectly count the number of bytes: rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { if (rx_limit - dev->rx_outstanding <= 0) break; rx_limit--; dev->rx_outstanding++; } DW_IC_RXFLR indicates how many bytes are available to be read in the FIFO, dev->rx_fifo_depth is the FIFO size, and dev->rx_outstanding is the number of bytes that we've requested to be read so far, but which have not been read. Firstly, increasing dev->rx_outstanding and decreasing rx_limit and then comparing them results in each byte consuming "two" bytes in this tracking, so this is obviously wrong. Secondly, the number of bytes that _could_ be received into the FIFO at any time is the number of bytes we have so far requested but not yet read from the FIFO - in other words dev->rx_outstanding. So, in order to request enough bytes to fill the RX FIFO, we need to request dev->rx_fifo_depth - dev->rx_outstanding bytes. Modifying the code thusly results in us reaching the maximum number of bytes outstanding each time we queue more "receive" operations, provided the transfer allows that to happen. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Russell King 提交于
Rather than reporting success for a short transfer due to interrupt latency, report an error both to the caller, as well as to the kernel log. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 18 11月, 2016 8 次提交
-
-
由 Tanmay Jagdale 提交于
The ACPI companion of the adapter has to be set for I2C controller code to read and attach the slave devices described in the ACPI table with the I2CSerialBus resource descriptor. Used ACPI_COMPANION_SET macro to set this. Signed-off-by: NTanmay Jagdale <tanmay.jagdale@broadcom.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Masahiro Yamada 提交于
Documentation/CodingStyle recommends to use label names which say what the goto does or why the goto exists. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Masahiro Yamada 提交于
Documentation/CodingStyle recommends to use label names which say what the goto does or why the goto exists. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Jarkko Nikula 提交于
Allow more flexibility to bus speed selection. Now if there are I2C slave connections defined in ACPI the speed of slowest device on the bus will define the bus speed. However if also "clock-frequency" device property is defined we should use the slowest of these two. This is targeted to maker boards where developer may want to connect slower I2C slave devices to the bus than defined in existing ACPI I2C slave connections. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Tin Huynh 提交于
Free and Open IPMI use SMBUS BLOCK Read/Write to support SSIF protocol. However, I2C Designware Core Driver doesn't handle the case at the moment. The below patch supports this feature. Signed-off-by: NTin Huynh <tnhuynh@apm.com> Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Julia Lawall 提交于
Check for i2c_adapter_quirks structures that are only stored in the quirks field of an i2c_adapter structure. This field is declared const, so i2c_adapter_quirks structures that have this property can be declared as const also. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: Ray Jui <ray.jui@broadcom.com> # for bcm-iproc Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wei Yongjun 提交于
since clk_prepare_enable() is used to get i2c->clk, we should use clk_disable_unprepare() to release it for the error path. Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Acked-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Paul Gortmaker 提交于
The Kconfig currently controlling compilation of this code is: drivers/i2c/busses/Kconfig:config I2C_PXA_PCI drivers/i2c/busses/Kconfig: def_bool I2C_PXA && X86_32 && PCI && OF ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_pci_driver() uses the same init level priority as builtin_pci_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 07 11月, 2016 1 次提交
-
-
由 Noralf Trønnes 提交于
Support a dynamic clock by reading the frequency and setting the divisor in the transfer function instead of during probe. Signed-off-by: NNoralf Trønnes <noralf@tronnes.org> Reviewed-by: NMartin Sperl <kernel@martin.sperl.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-