1. 04 12月, 2006 1 次提交
  2. 01 7月, 2006 1 次提交
  3. 28 6月, 2006 2 次提交
  4. 15 6月, 2006 1 次提交
    • P
      powerpc: Use 64k pages without needing cache-inhibited large pages · bf72aeba
      Paul Mackerras 提交于
      Some POWER5+ machines can do 64k hardware pages for normal memory but
      not for cache-inhibited pages.  This patch lets us use 64k hardware
      pages for most user processes on such machines (assuming the kernel
      has been configured with CONFIG_PPC_64K_PAGES=y).  User processes
      start out using 64k pages and get switched to 4k pages if they use any
      non-cacheable mappings.
      
      With this, we use 64k pages for the vmalloc region and 4k pages for
      the imalloc region.  If anything creates a non-cacheable mapping in
      the vmalloc region, the vmalloc region will get switched to 4k pages.
      I don't know of any driver other than the DRM that would do this,
      though, and these machines don't have AGP.
      
      When a region gets switched from 64k pages to 4k pages, we do not have
      to clear out all the 64k HPTEs from the hash table immediately.  We
      use the _PAGE_COMBO bit in the Linux PTE to indicate whether the page
      was hashed in as a 64k page or a set of 4k pages.  If hash_page is
      trying to insert a 4k page for a Linux PTE and it sees that it has
      already been inserted as a 64k page, it first invalidates the 64k HPTE
      before inserting the 4k HPTE.  The hash invalidation routines also use
      the _PAGE_COMBO bit, to determine whether to look for a 64k HPTE or a
      set of 4k HPTEs to remove.  With those two changes, we can tolerate a
      mix of 4k and 64k HPTEs in the hash table, and they will all get
      removed when the address space is torn down.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      bf72aeba
  5. 22 4月, 2006 1 次提交
  6. 28 3月, 2006 1 次提交
  7. 22 3月, 2006 2 次提交
    • M
      [PATCH] powerpc: Replace platform_is_lpar() with a firmware feature · 57cfb814
      Michael Ellerman 提交于
      It has been decreed that platform numbers are evil, so as a step in that
      direction, replace platform_is_lpar() with a FW_FEATURE_LPAR bit.
      
      Currently FW_FEATURE_LPAR really means i/pSeries LPAR, in the future we might
      have to clean that up if we need to be more specific about what LPAR actually
      means. But that's another patch ...
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      57cfb814
    • M
      [PATCH] powerpc: Unconfuse htab_bolt_mapping() callers · caf80e57
      Michael Ellerman 提交于
      htab_bolt_mapping() takes a vstart and pstart parameter, but all but one of
      its callers actually pass it vstart and vstart. Luckily before it passes
      paddr (calculated from paddr) to the hpte_insert routines it calls
      virt_to_abs() (aka. __pa()) on the address, so there isn't actually a bug.
      
      map_io_page() however does pass pstart properly, so currently it's broken
      AFAICT because we're calling __pa(paddr) which will get us something very
      large. Presumably no one's calling map_io_page() in the right context.
      
      Anyway, change htab_bolt_mapping() callers to properly pass pstart, and then
      use it properly in htab_bolt_mapping(), ie. don't call __pa() on it again.
      
      Booted on p5 LPAR, iSeries and Power3.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      caf80e57
  8. 28 2月, 2006 1 次提交
    • M
      [PATCH] powerpc/iseries: Fix double phys_to_abs bug in htab_bolt_mapping · 56ec6462
      Michael Ellerman 提交于
      Before the merge I updated create_pte_mapping() to work for iSeries, by
      calling iSeries_hpte_bolt_or_insert. (4c55130b)
      
      Later we changed iSeries_hpte_insert to cope with the bolting case, and called
      that instead from create_pte_mapping() (which was renamed to htab_bolt_mapping)
      (3c726f8d).
      
      Unfortunately that change introduced a subtle bug, where we pass an absolute
      address to iSeries_hpte_insert() where it expects a physical address. This
      leads to us calling phys_to_abs() twice on the physical address, which is
      seriously bogus.
      
      This only causes a problem if the absolute address from the first translation
      can be looked up again in the chunk_map, which depends on the size and layout
      of memory. I've seen it fail on one box, but not others.
      
      The minimal fix is to pass the physical address to iSeries_hpte_insert(). For
      2.6.17 we should make phys_to_abs() BUG if we try to double-translate an
      address.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      56ec6462
  9. 24 2月, 2006 1 次提交
  10. 07 2月, 2006 1 次提交
    • M
      [PATCH] powerpc: Always panic if lmb_alloc() fails · d7a5b2ff
      Michael Ellerman 提交于
      Currently most callers of lmb_alloc() don't check if it worked or not, if it
      ever does weird bad things will probably happen. The few callers who do check
      just panic or BUG_ON.
      
      So make lmb_alloc() panic internally, to catch bugs at the source. The few
      callers who did check the result no longer need to.
      
      The only caller that did anything interesting with the return result was
      careful_allocation(). For it we create __lmb_alloc_base() which _doesn't_ panic
      automatically, a little messy, but passable.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      d7a5b2ff
  11. 10 1月, 2006 1 次提交
  12. 09 1月, 2006 2 次提交
    • M
      [PATCH] powerpc: Separate usage of KERNELBASE and PAGE_OFFSET · b5666f70
      Michael Ellerman 提交于
      This patch separates usage of KERNELBASE and PAGE_OFFSET. I haven't
      looked at any of the PPC32 code, if we ever want to support Kdump on
      PPC we'll have to do another audit, ditto for iSeries.
      
      This patch makes PAGE_OFFSET the constant, it'll always be 0xC * 1
      gazillion for 64-bit.
      
      To get a physical address from a virtual one you subtract PAGE_OFFSET,
      _not_ KERNELBASE.
      
      KERNELBASE is the virtual address of the start of the kernel, it's
      often the same as PAGE_OFFSET, but _might not be_.
      
      If you want to know something's offset from the start of the kernel
      you should subtract KERNELBASE.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      b5666f70
    • A
      [PATCH] spufs: The SPU file system, base · 67207b96
      Arnd Bergmann 提交于
      This is the current version of the spu file system, used
      for driving SPEs on the Cell Broadband Engine.
      
      This release is almost identical to the version for the
      2.6.14 kernel posted earlier, which is available as part
      of the Cell BE Linux distribution from
      http://www.bsc.es/projects/deepcomputing/linuxoncell/.
      
      The first patch provides all the interfaces for running
      spu application, but does not have any support for
      debugging SPU tasks or for scheduling. Both these
      functionalities are added in the subsequent patches.
      
      See Documentation/filesystems/spufs.txt on how to use
      spufs.
      Signed-off-by: NArnd Bergmann <arndb@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      67207b96
  13. 30 12月, 2005 1 次提交
  14. 09 12月, 2005 1 次提交
    • D
      [PATCH] powerpc: Add missing icache flushes for hugepages · cbf52afd
      David Gibson 提交于
      On most powerpc CPUs, the dcache and icache are not coherent so
      between writing and executing a page, the caches must be flushed.
      Userspace programs assume pages given to them by the kernel are icache
      clean, so we must do this flush between the kernel clearing a page and
      it being mapped into userspace for execute.  We were not doing this
      for hugepages, this patch corrects the situation.
      
      We use the same lazy mechanism as we use for normal pages, delaying
      the flush until userspace actually attempts to execute from the page
      in question.
      
      Tested on G5.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      cbf52afd
  15. 10 11月, 2005 1 次提交
  16. 08 11月, 2005 2 次提交
  17. 07 11月, 2005 3 次提交
    • D
      [PATCH] ppc64: Fix bug in SLB miss handler for hugepages · 7d24f0b8
      David Gibson 提交于
      This patch, however, should be applied on top of the 64k-page-size patch to
      fix some problems with hugepage (some pre-existing, another introduced by
      this patch).
      
      The patch fixes a bug in the SLB miss handler for hugepages on ppc64
      introduced by the dynamic hugepage patch (commit id
      c594adad) due to a misunderstanding of the
      srd instruction's behaviour (mea culpa).  The problem arises when a 64-bit
      process maps some hugepages in the low 4GB of the address space (unusual).
      In this case, as well as the 256M segment in question being marked for
      hugepages, other segments at 32G intervals will be incorrectly marked for
      hugepages.
      
      In the process, this patch tweaks the semantics of the hugepage bitmaps to
      be more sensible.  Previously, an address below 4G was marked for hugepages
      if the appropriate segment bit in the "low areas" bitmask was set *or* if
      the low bit in the "high areas" bitmap was set (which would mark all
      addresses below 1TB for hugepage).  With this patch, any given address is
      governed by a single bitmap.  Addresses below 4GB are marked for hugepage
      if and only if their bit is set in the "low areas" bitmap (256M
      granularity).  Addresses between 4GB and 1TB are marked for hugepage iff
      the low bit in the "high areas" bitmap is set.  Higher addresses are marked
      for hugepage iff their bit in the "high areas" bitmap is set (1TB
      granularity).
      
      To avoid conflicts, this patch must be applied on top of BenH's pending
      patch for 64k base page size [0].  As such, this patch also addresses a
      hugepage problem introduced by that patch.  That patch allows hugepages of
      1MB in size on hardware which supports it, however, that won't work when
      using 4k pages (4 level pagetable), because in that case hugepage PTEs are
      stored at the PMD level, and each PMD entry maps 2MB.  This patch simply
      disallows hugepages in that case (we can do something cleverer to re-enable
      them some other day).
      
      Built, booted, and a handful of hugepage related tests passed on POWER5
      LPAR (both ARCH=powerpc and ARCH=ppc64).
      
      [0] http://gate.crashing.org/~benh/ppc64-64k-pages.diffSigned-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      7d24f0b8
    • D
      [PATCH] powerpc: Kill ppcdebug · dcad47fc
      David Gibson 提交于
      The ancient ppcdebug/PPCDBG mechanism is now only used in two places.
      First, in the hash setup code, one of the bits allows the size of the
      hash table to be reduced by a factor of 8 - which would be better
      accomplished with a command line option for that purpose.  The other
      was a bunch of bus walking related messages in the iSeries code, which
      would seem to be insufficient reason to keep the mechanism.
      
      This patch removes the last traces of this mechanism.
      
      Built and booted on iSeries and pSeries POWER5 LPAR (ARCH=powerpc).
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      dcad47fc
    • B
      [PATCH] ppc64: support 64k pages · 3c726f8d
      Benjamin Herrenschmidt 提交于
      Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel
      base page size to 64K.  The resulting kernel still boots on any
      hardware.  On current machines with 4K pages support only, the kernel
      will maintain 16 "subpages" for each 64K page transparently.
      
      Note that while real 64K capable HW has been tested, the current patch
      will not enable it yet as such hardware is not released yet, and I'm
      still verifying with the firmware architects the proper to get the
      information from the newer hypervisors.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      3c726f8d
  18. 12 10月, 2005 1 次提交
  19. 10 10月, 2005 1 次提交
  20. 23 9月, 2005 1 次提交
    • M
      ppc64 iSeries: Update create_pte_mapping to replace iSeries_bolt_kernel() · 4c55130b
      Michael Ellerman 提交于
      early_setup() calls htab_initialize() which is similar, but not identical
      to iSeries_bolt_kernel().
      
      On iSeries the Hypervisor has already inserted some ptes for us, and we
      simply have to detect that and bolt them. iSeries_hpte_bolt_or_insert()
      implements that logic.
      
      For the case of a non-existing pte we just call iSeries_hpte_insert(). This
      appears to work, although it's not entirely equivalent to the old code in
      iSeries_make_pte() which panicked if we got a secondary slot. Not sure if
      that's important.
      
      Finally we call iSeries_hpte_bolt_or_insert() from create_pte_mapping(),
      which is called from htab_initialize() for each lmb region.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      4c55130b
  21. 21 9月, 2005 1 次提交
  22. 29 8月, 2005 2 次提交
  23. 14 7月, 2005 1 次提交
  24. 22 6月, 2005 2 次提交
  25. 06 5月, 2005 1 次提交
    • D
      [PATCH] ppc64: pgtable.h and other header cleanups · 1f8d419e
      David Gibson 提交于
      This patch started as simply removing a few never-used macros from
      asm-ppc64/pgtable.h, then kind of grew.  It now makes a bunch of
      cleanups to the ppc64 low-level header files (with corresponding
      changes to .c files where necessary) such as:
      	- Abolishing never-used macros
      	- Eliminating multiple #defines with the same purpose
      	- Removing pointless macros (cases where just expanding the
      macro everywhere turns out clearer and more sensible)
      	- Removing some cases where macros which could be defined in
      terms of each other weren't
      	- Moving imalloc() related definitions from pgtable.h to their
      own header file (imalloc.h)
      	- Re-arranging headers to group things more logically
      	- Moving all VSID allocation related things to mmu.h, instead
      of being split between mmu.h and mmu_context.h
      	- Removing some reserved space for flags from the PMD - we're
      not using it.
      	- Fix some bugs which broke compile with STRICT_MM_TYPECHECKS.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      1f8d419e
  26. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4