This patch enables arm-pmu to bind device tree for exynos5250. The exynos5250
has two pmus which have combiner irq type.
Reviewed-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NChanho Park <chanho61.park@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The clock frequency of xxti and xusbxti clocks is dependent on the
frequency of the on-board oscillator that is used to generate these
clocks. So allow the frequency of these clocks to be specfied from
device tree.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For all supported peripheral controllers on Exynos5440, add clock
lookup information.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For all supported peripheral controllers on Exynos5250, add clock
lookup information.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For all supported peripheral controllers on Exynos4 SoCs, add clock
lookup information.
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Tested-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add clock controller nodes for EXYNOS4210, EXYNOS4x12, EXYNOS5250
and EXYNOS5440 SoCs.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Fix typo on register address of slink3 controller where register
address is wrongly set as 0x7000d480 but it is 0x7000d800.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

There was only chip enable and readdy/busy pins for the nand controller.
This add the rest of the pins.
pinctrl_nand_16bits contains the specific muxes for 16 bits NANDs.
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Comments on NAND pins where inverted.
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The ab8500 device is a child of the prcmu device, which is a memory mapped
bus device, whose children are addressable using physical memory addresses,
not using mailboxes, so a mailbox number in the ab8500 node cannot be
parsed by DT. Nothing uses this number, since it was only introduced
as part of the failed attempt to clean up prcmu mailbox handling, and
we can simply remove it.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

This patch adds #dma-cells property to PL330 DMA controller nodes for
supporting generic dma dt bindings on SOCFPGA platform. #dma-channels
and #dma-requests are not required now but added in advance.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add MCT device tree node for Exynos4210, Exynos4212, Exynos4412
and Exynos5250.

Cc: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The orion5x-lacie-ethernet-disk-mini-v2.dts file was using
"marvell-orion5x-88f5182" as a compatible string, while it should have
been "marvell,orion5x-88f5182".
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

There is no need to have a #address-cells property in the MPIC Device
Tree node, and more than that, having it confuses the of_irq_map_raw()
logic, which will be used by the Marvell PCIe driver.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Setting the reg-io-width to 1 byte represents more accurate
description of the HW.

This will fix an issue where UART driver causes kernel
panic during bootup. Gregory CLEMENT traced the issue to
autoconfig() in 8250.c, where the existence of FIFO is
checked from UART_IIR register. The register is now read as
32-bit value as the reg-io-width is set to 4-bytes. The
retuned value seems to contain bogus data for bits 31:8,
causing the issue.
Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Tested-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The commit:

  48be9ac9 ARM: Dove: split legacy and DT setup

removed the RTC initialization.  This patch re-enables the RTC
via the DT.
Signed-off-by: NJean-François Moine <moinejf@free.fr>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This patch modifies the Armada 370 Reference Design DTS file to enable
support for the two USB ports found on this board.
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The Marvell RTC on Kirkwood makes use of the runit clock. Ensure the
driver clk_prepare_enable() this clock, otherwise there is a danger
the SoC will lockup when accessing RTC registers with the clock
disabled.
Reported-by: NSimon Baatz <gmbnomis@gmail.com>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NSimon Baatz <gmbnomis@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The kirkwood SoC GPIO cores use the runit clock. Add code to
clk_prepare_enable() runit, otherwise there is a danger of locking up
the SoC by accessing the GPIO registers when runit clock is not
ticking.
Reported-by: NSimon Baatz <gmbnomis@gmail.com>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NSimon Baatz <gmbnomis@gmail.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

When DT support for kirkwood was first introduced, there was no clock
infrastructure.  As a result, we had to manually pass the
clock-frequency to the driver from the device node.

Unfortunately, on kirkwood, with minimal config or all module configs,
clock-frequency breaks booting because of_serial doesn't consume the
gate_clk when clock-frequency is defined.

The end result on kirkwood is that runit gets gated, and then the boot
fails when the kernel tries to write to the serial port.

Fix the issue by removing the clock-frequency parameter from all
kirkwood dts files.

Booted on dreamplug without earlyprintk and successfully logged in via
ttyS0.
Reported-by: NSimon Baatz <gmbnomis@gmail.com>
Tested-by: NSimon Baatz <gmbnomis@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The exynos5250 based chromebooks have a max77686 pmic on i2c channel 0.
Add support for the pmic in the common cros5250 dts file.
Tested after enabling cpufreq support for exynos5250 SoC and varying the
arm frequency/voltage using the userspace governer.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Acked-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds device tree nodes for MFC and G-scaler power
domains of exynos5250.It binds these power-domain nodes to repsective
device tree nodes

It also adds support to enable PM generic domains for exynos5250.
Signed-off-by: NPrasanna Kumar <prasanna.ps@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adding OHCI device tree node for Exynos5250 along with
the device base address.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adding EHCI device tree node for Exynos5250 along with
the device base adress and gpio line for vbus.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add device tree node for DP controller in EXYNOS5250 and
enable the instance for the SMDK5250 board.
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch enables RTC device node defined in exynos4.dtsi for
exynos4412-odroidx.
Signed-off-by: NDongjin Kim <tobetter@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This fixes the property of dw-mshc-sdr-timing and dw-mshc-ddr-timing as per
its current binding, it only has two cells.
Signed-off-by: NDongjin Kim <tobetter@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Arndale is a low cost board based on the Samsung Exynos5250 SoC.
This patch adds initial device tree support for this board.
Reviewed-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NGirish K S <ks.giri@samsung.com>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds timer node and re-organizes cpu node for exynos5440.
Acked-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch removes disabled status from I2C node for exynos5440-ssdk5440,
and fixes the incorrect compatible property value of i2c for exynos5440.
Signed-off-by: NGiridhar Maruthy <giridhar.m@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NGiridhar Maruthy <giridhar.m@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NGiridhar Maruthy <giridhar.m@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>