- 09 5月, 2012 3 次提交
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由 Andrew Lunn 提交于
The t_clk is moved from the shared part of the ethernet driver into the per port section. Each port can have its own gated clock, which it needs to enable/disable, as oppossed to there being one clock shared by all ports. In practice, only kirkwood supports this at the moment. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Remove now redundant tclk from SPI platform data. This makes the platform data empty, so remove it. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Add tclk as a fixed rate clock for all platforms. In addition, on kirkwood, add a gated clock for most of the clocks which can be gated. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> [mturquette@linaro.org: removed redundant CLKDEV_LOOKUP from Kconfig] [mturquette@linaro.org: removed redundant clk.h from mach-dove/common.c] Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 10 2月, 2012 1 次提交
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由 Andrew Lunn 提交于
The patch "ARM: orion: Consolidate USB platform setup code.", commit 4fcd3f37 broke USB on TS-7800 and other orion5x boards, because the wrong type of PHY was being passed to the EHCI driver in the platform data. Orion5x needs EHCI_PHY_ORION and all the others want EHCI_PHY_NA. Allow the mach- code to tell the generic plat-orion code which USB PHY enum to place into the platform data. Version 2: Rebase to v3.3-rc2. Reported-by: NAmbroz Bizjak <ambrop7@gmail.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NAmbroz Bizjak <ambrop7@gmail.com> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 05 1月, 2012 1 次提交
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由 Russell King 提交于
Hook these platforms restart code into the new restart hook rather than using arch_reset(). Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 12月, 2011 2 次提交
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NMichael Walle <michael@walle.cc> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NMichael Walle <michael@walle.cc> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 14 9月, 2011 1 次提交
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由 Nicolas Pitre 提交于
Commit 980f9f60 "ARM: orion: Consolidate SPI initialization." broke it by overwriting the SPI0 registration. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Cc: <stable@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 17 6月, 2011 1 次提交
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由 Andrew Lunn 提交于
Jesper Juhl pointed out there is a redundant include of linux/serial_8250.h. However it turns out both are redundant. This patch removes them both. Reported-by: NJesper Juhl <jj@chaosbits.net> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NJesper Juhl <jj@chaosbits.net> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 17 5月, 2011 9 次提交
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
This change removes the interrupt resource. The driver does not use it. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Changing eg 0xffffffff to DMA_BIT_MASK(32) etc allows easier side by side comparision of identical code which can be consolidated. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 04 3月, 2011 1 次提交
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由 Lennert Buytenhek 提交于
This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 09 1月, 2011 1 次提交
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由 Mike Rapoport 提交于
Signed-off-by: NMike Rapoport <mike@compulab.co.il> CC: Saeed Bishara <saeed@marvell.com> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 17 7月, 2010 1 次提交
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由 Saeed Bishara 提交于
Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 05 2月, 2010 1 次提交
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由 H Hartley Sweeten 提交于
The (void *) cast is not needed when setting dev.platform_data to the address of the data. Remove the casts. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 28 11月, 2009 2 次提交
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由 Lennert Buytenhek 提交于
Support for the Tauros2 L2 cache controller as used with the PJ1 and PJ4 CPUs. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Saeed Bishara 提交于
The Marvell Dove (88AP510) is a high-performance, highly integrated, low power SoC with high-end ARM-compatible processor (known as PJ4), graphics processing unit, high-definition video decoding acceleration hardware, and a broad range of peripherals. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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