Fix 'leds' node name indent as it was wrongly aligned.
Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Also, define aliases for spi[123].
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Also, define aliases for spi[123].
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Enable the SDHI0 controller on iWave RZ/G1E carrier board.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add support for the SPI NOR device used to boot up the system
to the System on Module DT.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the DT node for the QSPI interface to the SoC dtsi.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add support for the SPI NOR device used to boot up the system
to the System on Module DT.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the DT node for the QSPI interface to the SoC dtsi.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Enable the SDHI1 controller on iWave RZ/G1E SoM.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the SDHI controllers to the r8a7745 device tree.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add properties to describe the reset topology for on-SoC devices:
  - Add the "#reset-cells" property to the CPG/MSSR device node,
  - Add resets and reset-names properties to the various device nodes.

This allows to reset SoC devices using the Reset Controller API.

Note that resets usually match the corresponding module clocks.
Exceptions are:
  - The audio module has resets for the Serial Sound Interfaces only,
  - The display module has only a single reset for all DU channels, but
    adding reset properties for the display is postponed.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add properties to describe the reset topology for on-SoC devices:
  - Add the "#reset-cells" property to the CPG/MSSR device node,
  - Add resets and reset-names properties to the various device nodes.

This allows to reset SoC devices using the Reset Controller API.

Note that resets usually match the corresponding module clocks.
Exceptions are:
  - The audio module has resets for the Serial Sound Interfaces only,
  - The display module has only a single reset for all DU channels, but
    adding reset properties for the display is postponed.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add properties to describe the reset topology for on-SoC devices:
  - Add the "#reset-cells" property to the CPG/MSSR device node,
  - Add resets and reset-names properties to the various device nodes.

This allows to reset SoC devices using the Reset Controller API.

Note that resets usually match the corresponding module clocks.
Exceptions are:
  - The audio module has resets for the Serial Sound Interfaces only,
    but audio is not yet enabled in r8a7792.dtsi,
  - The display module has only a single reset for all DU channels, but
    adding reset properties for the display is postponed.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add properties to describe the reset topology for on-SoC devices:
  - Add the "#reset-cells" property to the CPG/MSSR device node,
  - Add resets and reset-names properties to the various device nodes.

This allows to reset SoC devices using the Reset Controller API.

Note that resets usually match the corresponding module clocks.
Exceptions are:
  - The audio module has resets for the Serial Sound Interfaces only,
  - The display module has only a single reset for all DU channels, but
    adding reset properties for the display is postponed.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add properties to describe the reset topology for on-SoC devices:
  - Add the "#reset-cells" property to the CPG/MSSR device node,
  - Add resets and reset-names properties to the various device nodes.

This allows to reset SoC devices using the Reset Controller API.

Note that resets usually match the corresponding module clocks.
Exceptions are:
  - The audio module has resets for the Serial Sound Interfaces only,
  - The display module has only a single reset for all DU channels, but
    adding reset properties for the display is postponed.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The WP pins are ACTIVE_HIGH, fix it in the DTS.

Fixes: 2b41091b ("ARM: dts: alt: add SDHI0 and 1 support")
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Define the r8a7743 generic part of the USB PHY device node.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add device nodes for the r8a7743 internal PCI bridge devices.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Define the iWave RainboW-G22D board dependent part of the Ethernet
AVB device node.

On some older versions of the platform (before R4.0) the phy address
may be 1 or 3. The address is fixed to 3 for R4.0 onwards (which
will be the first mainstream release), hence using 3 in the dts.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Adding pinctrl support for scif4 interface.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Define the iWave RainboW-G20D-Qseven board dependent part of the
RTC device node.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add Ethernet AVB support for r8a7745 SoC.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add device nodes for user leds on gr-peach board.
Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add pin configuration subnode for SCIF2 serial debug interface.
Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove an empty line in gr-peach device tree source file.
Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The current practice is to not group clocks under a "clocks" subnode,
but just put them together with the other on-SoC devices.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Convert the R-Car M2-W SoC from the old "Renesas R-Car Gen2 Clock Pulse
Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop
(MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse
Generator / Module Standby and Software Reset" DT bindings.

This simplifies the DTS files, and allows to add support for reset
control later.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add support for the bq32000 RTC to the iwg22m device tree.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add eMMC support for iW-RainboW-G22M-SM.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add MMC interface support for r8a7745 SoC.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add I2C[0-5] devices to the r8a7745 device tree.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add support for iWave RainboW-G22D-SODIMM board based on RZ/G1E.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add support for iWave RZG1E SODIMM System On Module.
http://www.iwavesystems.com/rz-g1e-sodimm-module.htmlSigned-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Describe GPIO blocks in the R8A7745 device tree.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Define the iWave RainboW-G20D-Qseven board dependent part of the
SDHI1 device node.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Acked-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>