Some TI Keystone family of SoCs contain a system controller (like the
Power Management Micro Controller (PMMC) on 66AK2G SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations
are provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.

This patch adds a reset driver that communicates to the system
controller over the TI SCI protocol for performing reset management
of various devices present on the SoC. Various reset functionalities
are achieved by the means of different TI SCI device operations
provided by the TI SCI framework.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
[s-anna@ti.com: documentation changes, revised commit message]
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
[p.zabel@pengutronix.de: const struct reset_control_ops]
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The Cortina Systems Gemini reset controller is a simple
32bit register with self-deasserting reset lines. It is
accessed using regmap over syscon.
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Rename the current Kconfig name used for the TI SYSCON Reset
driver from TI_SYSCON_RESET to RESET_TI_SYSCON to match the
convention used for all the reset drivers present at the
base reset folder.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This patch adds the reset controller functionality for
Peripheral PHYs to the Arria10 System Resource Chip.
Signed-off-by: NThor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add reset controller driver exposing various reset faculties,
implemented by System Reset Controller IP block.

Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This patch adds reset controller driver for ZTE's zx2967 family.
Signed-off-by: NBaoyou Xie <baoyou.xie@linaro.org>
Reviewed-by: NShawn Guo <shawnguo@kernel.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This driver uses the services provided by the BPMP firmware driver to
implement a reset driver based on the MRQ_RESET request.
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.

Cc: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.

Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Gabriel Fernandez <gabriel.fernandez@st.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: NDinh Nguyen <dinguyen@opensource.altera.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.

Cc: Damien Horsley <Damien.Horsley@imgtec.com>
Acked-by: NJames Hartley <james.hartley@imgtec.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: NJoachim Eastwood <manabian@gmail.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.

Cc: Antoine Tenart <antoine.tenart@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: NAban Bedel <albeu@free.fr>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This is the initial commit for UniPhier reset controller driver.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add a reset-controller driver for performing reset management of
various devices present on the SoC, with the reset registers shared
between devices in a common register memory space. This driver uses
the syscon/regmap frameworks to actually implement the various reset
functionalities needed by the reset consumer devices.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
[s-anna@ti.com: add documentation, syscon name change]
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

In "make menuconfig", reset drivers are currently lined up together
with the reset sub-system menu, like this:

    -*- Reset Controller Support  ----
    < > Hi6220 Reset Driver

(It also means, the menu "Reset Controller Support" is always empty.)

"Hi6220 Reset Driver" should go into the sub-menu of the
"Reset Controller Support".
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add System reset controller driver for Oxford Semiconductor OXNAS SoC
Family.

CC: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add reset driver for hi6220-hikey board,this driver supply deassert
of IP on hi6220 SoC.
Signed-off-by: NChen Feng <puck.chen@hisilicon.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This patch adds a reset controller implementation for STMicroelectronics
STi family SoCs; it allows a group of related reset like controls found
in multiple system configuration registers to be represented by a single
controller device. System configuration registers are accessed through
the regmap framework and the mfd/syscon driver.

The implementation optionally supports waiting for the reset action to
be acknowledged in a separate status register and supports both
active high and active low reset lines. These properties are common across
all the reset channels in a specific reset controller instance, hence
all channels in a paritcular controller are expected to behave in the
same way.
Signed-off-by: NStephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This adds a simple API for devices to request being reset
by separate reset controller hardware and implements the
reset signal device tree binding.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NPavel Machek <pavel@ucw.cz>