1. 13 8月, 2018 1 次提交
  2. 11 8月, 2018 1 次提交
  3. 08 8月, 2018 3 次提交
  4. 05 8月, 2018 2 次提交
  5. 02 8月, 2018 2 次提交
  6. 01 8月, 2018 2 次提交
  7. 31 7月, 2018 2 次提交
    • A
      spi: dw: document Microsemi integration · f09757ab
      Alexandre Belloni 提交于
      The integration of the Designware SPI controller on Microsemi SoCs requires
      an extra register set to be able to give the IP control of the SPI
      interface.
      
      Cc: Rob Herring <robh+dt@kernel.org>
      Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      f09757ab
    • J
      KVM: s390: Add huge page enablement control · a4499382
      Janosch Frank 提交于
      General KVM huge page support on s390 has to be enabled via the
      kvm.hpage module parameter. Either nested or hpage can be enabled, as
      we currently do not support vSIE for huge backed guests. Once the vSIE
      support is added we will either drop the parameter or enable it as
      default.
      
      For a guest the feature has to be enabled through the new
      KVM_CAP_S390_HPAGE_1M capability and the hpage module
      parameter. Enabling it means that cmm can't be enabled for the vm and
      disables pfmf and storage key interpretation.
      
      This is due to the fact that in some cases, in upcoming patches, we
      have to split huge pages in the guest mapping to be able to set more
      granular memory protection on 4k pages. These split pages have fake
      page tables that are not visible to the Linux memory management which
      subsequently will not manage its PGSTEs, while the SIE will. Disabling
      these features lets us manage PGSTE data in a consistent matter and
      solve that problem.
      Signed-off-by: NJanosch Frank <frankja@linux.ibm.com>
      Reviewed-by: NDavid Hildenbrand <david@redhat.com>
      a4499382
  8. 30 7月, 2018 18 次提交
  9. 27 7月, 2018 2 次提交
  10. 26 7月, 2018 3 次提交
  11. 25 7月, 2018 3 次提交
    • R
      dt-bindings: mtd: explicitly document nesting partitions descriptions · d2ad00eb
      Rafał Miłecki 提交于
      Documentation was already saying that fixed and dynamic partitioning can
      be mixed but was missing a clear description and examples. This commit
      adds a proper documentation of how descriptions can be nested and how
      layouts can be mixed.
      
      This addition is important for partitions that contain subpartitions.
      In such cases partitions have to be properly described in order to let
      system handle them correctly.
      
      Depending on situation, nesting descriptions may provide more accurate
      logic/structure and/or allow mixing partitioning types (various
      "compatible" values).
      Signed-off-by: NRafał Miłecki <rafal@milecki.pl>
      Reviewed-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>
      d2ad00eb
    • K
      pinctrl: samsung: Add dedicated compatible for S5Pv210 wakeup interrupts · bb928dfd
      Krzysztof Kozlowski 提交于
      The S5Pv210 external wakeup interrupts differ from Exynos therefore
      separate compatible is needed.  Duplicate existing flavor specific data
      from exynos4210_wkup_irq_chip and add new compatible for S5Pv210.
      At this point this new compatible does not bring anything new and works
      exactly as existing "samsung,exynos4210-wakeup-eint".
      Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      Cc: Tomasz Figa <tomasz.figa@gmail.com>
      Cc: Sylwester Nawrocki <snawrocki@kernel.org>
      Acked-by: NTomasz Figa <tomasz.figa@gmail.com>
      Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      bb928dfd
    • K
      pinctrl: samsung: Document hidden requirement about one external wakeup · 615a673c
      Krzysztof Kozlowski 提交于
      ARMv7 hardware (S5Pv210 and Exynos SoCs) provides only 32 external
      interrupts which can wakeup device from deep sleep modes.  On S5Pv210
      these are gph0-gph3.  On all ARMv7 Exynos designs these are gpx0-gpx3.
      There is only one 32-bit register for controlling the external wakeup
      interrupt mask (masking and unmasking waking capability of these
      interrupts).
      
      This lead to implementation in pinctrl driver and machine code which was
      using static memory for storing the mask value and not caring about
      multiple devices of pin controller... because only one pin controller
      device will be handling this.
      
      Since each pin controller node in Device Tree maps onto one device, this
      corresponds to hidden assumption in parsing the Device Tree: external
      wakeup interrupts can be defined only once.  Make this assumption an
      explicit requirement.
      
      ARMv8 Exynos5433 and Exynos7 bring additional 32 external wakeup
      interrupts (up to 64 total, banks gpa0-gpa3 and gpf1-gpf5) and another
      32-bit wide register for controlling them.  Existing code does not
      support it but anyway these additional interrupts will be belonging to
      the same pin controller device/node.
      Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      Cc: Tomasz Figa <tomasz.figa@gmail.com>
      Cc: Sylwester Nawrocki <snawrocki@kernel.org>
      Acked-by: NTomasz Figa <tomasz.figa@gmail.com>
      Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      615a673c
  12. 24 7月, 2018 1 次提交