- 26 3月, 2015 2 次提交
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由 Geert Uytterhoeven 提交于
The existing variable gpio_chip already points to the gpiochip instance, hence use it everywhere. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Shobhit Kumar 提交于
Export PANEL_EN/DISABLE (offset 0x52) as additional GPIO. Needed by display driver to enable the DSI panel on BYT platform where the Panel EN/Disable control is routed thorugh CRC PMIC CC: Samuel Ortiz <sameo@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: NDaniel Vetter <daniel@ffwll.ch> Signed-off-by: NShobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 3月, 2015 3 次提交
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由 Andy Shevchenko 提交于
The Intel Quark SoC contains the DW GPIO on board. While fixing the build error the commit 1972c97d (gpio: dwapb: fix compile errors) disables the possibility to build the driver on X86, i.e. Intel Quark. The patch reenables it for Intel Quark as well. Since we have Intel Quark SoC introduced in 4.0-rc1 I would like to make this fix available there as well, though the actual MFD driver [1] is applied only for next version. [1] https://lkml.org/lkml/2015/2/1/217 Fixes: 1972c97d (gpio: dwapb: fix compile errors) Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Rafael J. Wysocki 提交于
In acpi_gpiochip_request_interrupts() the handle local variable already contains the value that we want to pass to acpi_walk_resources(), so it is better to use that variable instead of evaluating ACPI_HANDLE() once more for the same device. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Rafael J. Wysocki 提交于
If dev is NULL in __gpiod_get_index() and both ACPI and OF are enabled, it will be checked twice before the code decides to give up with DT/ACPI lookup, so avoid that. Also use the observation that ACPI_COMPANION() is much more efficient than ACPI_HANDLE(), because the latter uses the former and carries out a check and a pointer dereference on top of it, so replace the ACPI_HANDLE() check with an ACPI_COMPANION() one which does not require the additional IS_ENABLED(CONFIG_ACPI) check too. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: NHanjun Guo <hanjun.guo@linaro.org> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 18 3月, 2015 4 次提交
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由 Andreas Bofjall 提交于
Add support for the GPIOs found on the Fintek SuperI/O chip F71869A, such as the one found on the Jetway JNF99-525 motherboard, to the f7188x gpio driver. Signed-off-by: NAndreas Bofjall <andreas@gazonk.org> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andreas Bofjall 提交于
Add support for the GPIOs found on the Fintek SuperI/O chip F71869, such as the one found on the Jetway NF96u-525 motherboard, to the f7188x gpio driver. Signed-off-by: NAndreas Bofjall <andreas@gazonk.org> Tested-by: NLes Schaffer <schaffer@optonline.net> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andreas Bofjall 提交于
The company is called "Fintek", not "Fintech". Fix it. Signed-off-by: NAndreas Bofjall <andreas@gazonk.org> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Commit 1feb57a2 "gpio: add parameter to allow the use named gpios" includes a double-consted array. What we want is not const const * but const * const (const pointer to const data). Fix this. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Cc: Olliver Schinagl <oliver@schinagl.nl> Cc: Rojhalat Ibrahim <imr@rtschenk.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 3月, 2015 1 次提交
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由 Grygorii Strashko 提交于
GPIOLib core implemnts irqchip->irq_request/release_resources callbacks internally and these callbacks already contain clalls of gpiochip_lock/unlock_as_irq(). Hence, remove unnecessary call of gpiochip_unlock_as_irq() from omap_gpio_irq_shutdown(). Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 3月, 2015 2 次提交
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由 Rob Herring 提交于
The macro BANK_OFF which calculates the base offset for each GPIO port. The macro is needlessly complex and unreadable. Simplify the calculation to a simple math operation. Signed-off-by: NRob Herring <robh@kernel.org> Cc: linux-gpio@vger.kernel.org Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Kefeng Wang 提交于
Hisilicon arm64 soc uses designWare gpio, re-enable it after commit 1972c97d(gpio: dwapb: fix compile errors). Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 3月, 2015 1 次提交
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由 Tien Hock Loh 提交于
Adds a new driver for Altera soft GPIO IP. The driver is able to do read/write and allows GPIO to be a interrupt controller. Tested on Altera GHRD on interrupt handling and IO. v10: - Updated conflicting device tree parameters - Removed unused headers - Used macro instead of magic numbers for ngpio - Code readability cleanup using ?: and temporal variables - Removed leftover garbage and unnecessary function calls - Checked bgpio_init but unusable because Altera GPIO may not be a multiple of 8 bits v9: - Removed duplicated initialization on set_type using temporals to improve code readability in calling generic_handle_irq - Using ?: ternary to reduce code size v8: - Using for_each_set_bit - Added const for struct definition - Removed naggy pr_err - Sort alpha header - Remove unused macros - Use fixed width data types instead of unsigned long - Whitespace issue fixes - Removed _relaxed function for better compatibility across different CPU - Changed irq_create_mapping to platform_get_irq updated implementation to use gpiochip_irqchip_add - Reserve interrupt-cells number 2 in device tree binding for future use - Remove confusing sections on devicetree bindings - Added tristate Kconfig help text v7: - Used dev_warn instead of pr_warn - Clean up unnecesarry if else indentation v6: - Added irq_startup and irq_shutdown - Changed bitwise clamping style - Cleanup bitwise operation to improve readability change naming of mapped irqs from virq to mapped_irq v5: - Dispose irq_domain mapping correctly - Update optional binding description in binding docs v4: - Added vendor prefix to devicetree binding for IP specific properties using MMIO GPIO helper library instead of manually map PIO to memory - altera_gpio_chip inline struct documentation to kerneldoc - Using dev_ print to print a better failure message v2, v3: - Do not reference NO_IRQ - Updated irq_set_type to only allow the hardware configured irq type Signed-off-by: NTien Hock Loh <thloh@altera.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 06 3月, 2015 1 次提交
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 3月, 2015 3 次提交
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由 Rojhalat Ibrahim 提交于
Add device managed variants of gpiod_get_array() / gpiod_put_array() functions for conveniently obtaining and disposing of an entire array of GPIOs with one function call. Signed-off-by: NRojhalat Ibrahim <imr@rtschenk.de> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Rojhalat Ibrahim 提交于
Introduce new functions for conveniently obtaining and disposing of an entire array of GPIOs with one function call. ACPI parts tested by Mika Westerberg, DT parts tested by Rojhalat Ibrahim. Change log: v5: move the ACPI functions to gpiolib-acpi.c v4: - use shorter names for members of struct gpio_descs - rename lut_gpio_count to platform_gpio_count for clarity - add check for successful memory allocation - use ERR_CAST() v3: - rebase on current linux-gpio devel branch - fix ACPI GPIO counting - allow for zero-sized arrays - make the flags argument mandatory for the new functions - clarify documentation v2: change interface Suggested-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NRojhalat Ibrahim <imr@rtschenk.de> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com> Tested-by: NRojhalat Ibrahim <imr@rtschenk.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Rojhalat Ibrahim 提交于
Avoid multiple identical definitions of the gpio suffix strings by putting them into a global constant array. Signed-off-by: NRojhalat Ibrahim <imr@rtschenk.de> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 3月, 2015 4 次提交
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由 Olliver Schinagl 提交于
The gpio binding document says that new code should always use named gpios. Patch 40b73183 added support to parse a list of gpios from child nodes, but does not make it possible to use named gpios. This patch adds the con_id property and implements it is done in gpiolib.c, where the old-style of using unnamed gpios still works. Signed-off-by: NOlliver Schinagl <oliver@schinagl.nl> Acked-by: NBryan Wu <cooloney@gmail.com> Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
The pcf857x GPIO and interrupt controller uses dummy_irq_chip, which does not implement irq_chip.irq_set_wake() and does not set IRQCHIP_SKIP_SET_WAKE. This causes two s2ram issues if wake-up is enabled for the pcf857x GPIO pins: 1. During resume from s2ram, the following warning is printed: WARNING: CPU: 0 PID: 1046 at kernel/irq/manage.c:537 irq_set_irq_wake+0x9c/0xf8() Unbalanced IRQ 113 wake disable 2. Wake-up through the pcf857x GPIO pins may fail, as the parent interrupt controller may be suspended. Migrate the pcf857x GPIO and interrupt controller from dummy_irq_chip to its own irq_chip. This irq chip implements irq_chip.irq_set_wake() to propagate its wake-up setting to the parent interrupt controller. This fixes wake-up through gpio-keys on sh73a0/kzm9g, where the pcf857x interrupt is cascaded to irq-renesas-intc-irqpin, and the latter must not be suspended when wake-up is enabled. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
Switch the PCF857x GPIO driver to use the gpiolib irqchip helpers. This driver uses a nested threaded interrupt, hence handle_nested_irq() and gpiochip_set_chained_irqchip() must be used. Note that this removes the checks added in commit 21fd3cd1 ("gpio: pcf857x: call the gpio user handler iff gpio_to_irq is done"), as the interrupt mappings are no longer created on-demand by the driver, but by gpiochip_irqchip_add() during initialization. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Benoit Parrot 提交于
Based on Boris Brezillion's work this is a reworked patch of his initial GPIO hogging mechanism. This patch provides a way to initially configure specific GPIO when the GPIO controller is probed. The actual DT scanning to collect the GPIO specific data is performed as part of gpiochip_add(). The purpose of this is to allow specific GPIOs to be configured without any driver specific code. This is particularly useful because board design are getting increasingly complex and given SoC pins can now have more than 10 mux values, a lot of connections are now dependent on external IO muxes to switch various modes. Specific drivers should not necessarily need to be aware of what accounts to a specific board implementation. This board level "description" should be best kept as part of the dts file. Signed-off-by: NBenoit Parrot <bparrot@ti.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 3月, 2015 2 次提交
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由 Linus Walleij 提交于
Take a sweep to bring the irq support for the MAX732x expanders into the gpiolib core to cut down on duplicated code. Only compile tested! I need some feedback from people using this expander with interrupts to tell me if things go right or wrong when I do this. Cc: Semen Protsenko <semen.protsenko@globallogic.com> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 2月, 2015 1 次提交
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由 Kevin Hao 提交于
The PPC_OF is a ppc specific option which is used to mean that the firmware device tree access functions are available. Since all the ppc platforms have a device tree, it is aways set to 'y' for ppc. So it makes no sense to keep a such option in the current kernel. Replace it with PPC. Signed-off-by: NKevin Hao <haokexin@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 2月, 2015 3 次提交
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由 Rob Herring 提交于
Add support for PXA1928 GPIOs. The PXA1928 adds a 6th bank from previous generations. Signed-off-by: NJing Xiang <jxiang@marvell.com> Signed-off-by: NXiangzhan Meng <mengxzh@marvell.com> [robh: ported to 3.19 from vendor kernel] Signed-off-by: NRob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Rob Herring 提交于
In preparation to enable ARCH_MMP on ARM64, the include of mach/irqs.h must be eliminated. mach/irqs.h was being included for IRQ_GPIO{0,1}, but these IRQs are always passed in as resources now. We can use irq0 and irq1 and get rid of IRQ_GPIOx. Get rid of the ifdef in the process as it is no longer needed. Signed-off-by: NRob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Cast the struct gpio_chip into a max732x_chip using an inline macro and move the assignment to the variable declaration to save lines and simplify things. Cc: Semen Protsenko <semen.protsenko@globallogic.com> Acked-by: NMans Rullgard <mans@mansr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 1月, 2015 4 次提交
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由 Olliver Schinagl 提交于
gpiolib uses a fixed string for the suffixes and defines it at 32 bytes. Later in the code snprintf is used with this fixed value of 32. Using sizeof() is safer in case the size for the suffixes is ever changed. Signed-off-by: NOlliver Schinagl <oliver@schinagl.nl> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mans Rullgard 提交于
This adds a set_multiple function to the MAX732x GPIO driver, allowing for performance gains when using gpiod_set_array(). Signed-off-by: NMans Rullgard <mans@mansr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Johan Hovold 提交于
Fix memory leak in the gpio sysfs interface due to failure to drop reference to device returned by class_find_device when setting the gpio-line polarity. Fixes: 07697461 ("gpiolib: add support for changing value polarity in sysfs") Cc: stable <stable@vger.kernel.org> # v2.6.33 Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Johan Hovold 提交于
Fix memory leak in the gpio sysfs interface due to failure to drop reference to device returned by class_find_device when creating a link. Fixes: a4177ee7 ("gpiolib: allow exported GPIO nodes to be named using sysfs links") Cc: stable <stable@vger.kernel.org> # v2.6.32 Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 1月, 2015 6 次提交
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由 Dmitry Eremin-Solenikov 提交于
As a part of driver consolidation, move GPIO-related IRQ code to drivers/gpio/gpio-sa1100.c. The code does not use GPIOLIB_IRQCHIP (yet), because sa1100 does not have a device for gpios, which is a requirement for GPIOLIB_IRQCHIP. This will be the next step. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Dmitry Eremin-Solenikov 提交于
Low GPIO pins use an interrupt in SC interrupts space. However it's possible to handle them as if all the GPIO interrupts are instead tied to single GPIO handler, which later decodes GEDR register and chain-calls next IRQ handler. So split first 11 interrupts into system part (IRQ_GPIO0_SC - IRQ_GPIO10_SC) which work exactly like the rest of system controller interrupts and real GPIO interrupts (IRQ_GPIO0..IRQ_GPIO10). A single handler sa1100_gpio_handler then decodes and calls next handler. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Chang Rebecca Swee Fun 提交于
Consolidating similar algorithms into common functions to make GPIO SCH simpler and manageable. Signed-off-by: NChang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Use devm_kstrdup to simplify the error handling path. Also return -ENOMEM instead of 0 if devm_kstrdup fails. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Olliver Schinagl 提交于
On my previous patch I was overly hasty and made the suffixes string array const char const *suffixes, instaed of const char * const suffixes. This patch corrects that Signed-off-by: NOlliver Schinagl <oliver@schinagl.nl> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 1月, 2015 2 次提交
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由 Sonic Zhang 提交于
Create default gpio base if neither device node nor platform data is defined. Cc: Stable <stable@vger.kernel.org> Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Tested-by: NAntonio Fiol <antonio@fiol.es> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tony Lindgren 提交于
Similar to omap_gpio_irq_type() let's make sure that the GPIO is usable as an interrupt if the platform init code did not call gpio_request(). Otherwise we can get invalid device access after setup_irq(): WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x214/0x340() 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4CFG (Idle): Data Access in Supervisor mode during Functional access ... [<c05f21e4>] (__irq_svc) from [<c05f1974>] (_raw_spin_unlock_irqrestore+0x34/0x44) [<c05f1974>] (_raw_spin_unlock_irqrestore) from [<c00914a8>] (__setup_irq+0x244/0x530) [<c00914a8>] (__setup_irq) from [<c00917d4>] (setup_irq+0x40/0x8c) [<c00917d4>] (setup_irq) from [<c0039c8c>] (omap_system_dma_probe+0x1d4/0x2b4) [<c0039c8c>] (omap_system_dma_probe) from [<c03b2200>] (platform_drv_probe+0x44/0xa4) ... We can fix this the same way omap_gpio_irq_type() is handling it. Note that the long term solution is to change the gpio-omap driver to handle the banks as separate driver instances. This will allow us to rely on just runtime PM for tracking the bank specific state. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@kernel.org> Cc: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 1月, 2015 1 次提交
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由 Linus Walleij 提交于
Make OF conditional on CONFIG_OF_GPIO, rename and register the match table. Reported-by: NMike Krinkin <krinkin.m.u@gmail.com> Cc: Wei Chen <Wei.Chen@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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