- 13 3月, 2012 1 次提交
-
-
由 Russell King - ARM Linux 提交于
Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
- 22 2月, 2012 1 次提交
-
-
由 Viresh Kumar 提交于
Flow controller information is passed now from DMA_SLAVE_CONFIG option. This patch makes changes in pl08x driver to use device_fc from it instead of platform data. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
- 31 1月, 2012 1 次提交
-
-
由 Julia Lawall 提交于
Rewrite a duplicated test to test the correct value The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression E; @@ ( * E || ... || E | * E && ... && E ) // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
- 05 12月, 2011 1 次提交
-
-
由 Viresh Kumar 提交于
Currently, if plchan->phychan is true, we return immediately from prep_phy_chan(). We must configure txd->ccfg and increment phychan_hold before returning. Otherwise, request line number wouldn't be configured in this txd. Reported-by: NRajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
- 22 11月, 2011 1 次提交
-
-
由 Dave Martin 提交于
Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NVinod Koul <vinod.koul@intel.com>
-
- 27 10月, 2011 1 次提交
-
-
由 Vinod Koul 提交于
fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: H Hartley Sweeten <hartleys@visionengravers.com> Cc: Li Yang <leoli@freescale.com> Cc: Zhang Wei <zw@zh-kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Barry Song <Baohua.Song@csr.com> Acked-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
- 19 9月, 2011 2 次提交
-
-
由 Viresh Kumar 提交于
In pl08x_free_txd(), check if pool is allocated successfully before freeing it. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Untill now, sg_len greater than one is not supported. This patch adds support to do that. Note: Still, if peripheral is flow controller, sg_len can't be greater that one. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
- 05 9月, 2011 1 次提交
-
-
由 Russell King - ARM Linux 提交于
Before converting the dma channel to our private data structure, first check that the channel is indeed one which our driver registered. We do this by ensuring that the underlying device is bound to our driver. This avoids potential oopses if we try to reference 'plchan->name' against a foreign drivers dma channel. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
- 25 8月, 2011 16 次提交
-
-
由 Viresh Kumar 提交于
pl08x_prep_channel_resources() is calling kfree() directly for txd(). To maintain consistency in code call pl08x_free_txd() instead. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
At least, on SPEAr platforms there is one peripheral, JPEG, which can be flow controller for DMA transfer. Currently DMA controller driver didn't support peripheral flow controller configurations. This patch adds device_fc field in struct pl08x_channel_data, which will be used only for slave transfers and is not used in case of mem2mem transfers. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
When we have DMA transfers between peripheral and memory, then we shouldn't reduce width of peripheral at all, as that may be a strict requirement. But we can always reduce width of memory access, with some compromise in performance. Thus, we must select peripheral as master and not memory. Also this rearranges code to make it shorter. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Currently lli_len is aligned to min of two widths, which looks to be incorrect. Instead it should be aligned to max of both widths. Lets say, total_size = 441 bytes MIN: lets check if min() suits or not: CASE 1: srcwidth = 1, dstwidth = 4 min(src, dst) = 1 i.e. We program transfer size in control reg to 441. Now, till 440 bytes everything is fine, but on the last byte DMAC can't transfer 1 byte to dst, as its width is 4. CASE 2: srcwidth = 4, dstwidth = 1 min(src, dst) = 1 i.e. we program transfer size in control reg to 110 (data transferred = 110 * srcwidth). So, here too 1 byte is left, but on the source side. MAX: Lets check if max() suits or not: CASE 3: srcwidth = 1, dstwidth = 4 max(src, dst) = 4 Aligned size is 440 i.e. We program transfer size in control reg to 440. Now, all 440 bytes will be transferred without any issues. CASE 4: srcwidth = 4, dstwidth = 1 max(src, dst) = 4 Aligned size is 440 i.e. We program transfer size in control reg to 110 (data transferred = 110 * srcwidth). Now, also all 440 bytes will be transferred without any issues. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Code for creating single byte llis is present at several places. Create a routine to avoid code redundancy. Also, we don't need one lli per single byte transfer, we can have single lli to do all single byte transfer. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
max_bytes_per_lli = bd.srcbus.buswidth * PL080_CONTROL_TRANSFER_SIZE_MASK; This is confirmed by ARM support guys. Below is summary of mail exchange with them: [Viresh] What is the total data to be transferred in case source and destination bus widths are different. Suppose, source bus width is 2 bytes and destination is 4 bytes. Now in order to transfer 80 bytes, what should be value of TransferSize field in control reg: 40? or 20?. [David from ARM] The value that is programmed into the TransferSize field should be the number of <SourceWidth> transfers needed to achieve the required data transfer. So, to transfer 80 bytes, with a Source Width of 2, the TransferSize field = should be programmed with: Total transfer size ------------------- = 40 <source width> [Viresh] Will this change if source is 4 bytes and dest is 2? [David] Yes - the calculation then becomes: Total transfer size ------------------- =20 <source width> Also, max_bytes_per_lli must be calculated after fixing src and dest widths not before that. So move this code to the correct place. This patch also removes max_bytes_per_lli from earlier print message, as till that point max_bytes_per_lli is unknown. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Pl080 Manual says: "Bursts do not cross the 1KB address boundary" We can program the controller to cross 1 KB boundary on a burst and controller can take care of this boundary condition by itself. Following is the discussion with ARM Technical Support Guys (David): [Viresh] Manual says: "Bursts do not cross the 1KB address boundary" What does that actually mean? As, Maximum size transferable with a single LLI is 4095 * 4 =16380 ~ 16KB. So, if we don't have src/dest address aligned to burst size, we can't use this big of an LLI. [David] There is a difference between bursts describing the total data transferred by the DMA controller and AHB bursts. Bursts described by the programmable parameters in the PL080 have no direct connection with the bursts that are seen on the AHB bus. The statement that "Bursts do not cross the 1KB address boundary" in the TRM is referring to AHB bursts, where this limitation is a requirement of the AHB spec. You can still issue bursts within the PL080 that are in excess of 1KB. The PL080 will make sure that its bursts are broken down into legal AHB bursts which will be formatted to ensure that no AHB burst crosses a 1KB boundary. Based on above discussion, this patch removes all code related to 1 KB boundary as we are not required to handle this in driver. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Currently, if error interrupt occurs, nothing is done in interrupt handler (just clearing the interrupts). We must somehow indicate this to the user that DMA is over, due to ERR interrupt or TC interrupt. So, this patch just schedules existing tasklet, with a print showing error interrupt has occurred on which channels. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
We have just executed following in pl08x_get_phy_channel(): ch->signal = -1; We don't have to compare "ch->signal < 0", as this will always be true. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits. Also as per manual, for bit 3-31 of DMACConfiguration register: "read undefined, write as 0" So, we must not rely on values read from this registers bit 3-31. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Insert notifiers for the runtime PM API. With this the runtime PM layer kicks in to action where used. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
For 8 memory and 16 slave channels 35 boot print lines are printed. And that is too much. Most of this would be more useful for debugging. So moving few of them to dev_dbg instead of dev_info. Now only 3 prints will be printed. This also rearrange one of the debug message to fit into two lines. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Similar comment is present over routine also pl08x_choose_master_bus(). Keeping one of them. Also rewrite that comment to convey message clearly. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
As mentioned in Documentation/CodingStyle, The preferred form for passing a size of a struct is the following: p = kmalloc(sizeof(*p), ...); The alternative form where struct name is spelled out hurts readability and introduces an opportunity for a bug when the pointer variable type is changed but the corresponding sizeof that is passed to a memory allocator is not. This patch replaces (struct xyz) with *ptr at several occurrences in driver. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
Header files included in driver are not present in alphabetical order. Rearrange them in alphabetical order. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Viresh Kumar 提交于
There were few formatting related issues in code. This patch fixes them. Fixes include: - Remove extra blank lines - align code to 80 cols - combine several lines to one line Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
- 09 8月, 2011 1 次提交
-
-
由 Russell King 提交于
Something changed during the 3.1 merge window in the include files which now causes the pl08x DMA engine driver to fail to build. Fix this by adding the now necessary dma-mapping.h include: drivers/dma/amba-pl08x.c: In function ■pl08x_unmap_buffers■: drivers/dma/amba-pl08x.c:1524: error: implicit declaration of function ■dma_unmap_single■ drivers/dma/amba-pl08x.c:1527: error: implicit declaration of function ■dma_unmap_page■ Acked-by: NVinod Koul <vinod.koul@intel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 26 7月, 2011 9 次提交
-
-
由 Vinod Koul 提交于
pl08x_width function does not handle rest of enums for DMA_SLAVE_BUSWIDTH_xxxx which causes gcc to emit below warining drivers/dma/amba-pl08x.c: In function 'pl08x_width': drivers/dma/amba-pl08x.c:1119: warning: enumeration value 'DMA_SLAVE_BUSWIDTH_UNDEFINED' not handled in switch drivers/dma/amba-pl08x.c:1119: warning: enumeration value 'DMA_SLAVE_BUSWIDTH_8_BYTES' not handled in switch this patch adds a default case which returns error Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Russell King - ARM Linux 提交于
Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Russell King - ARM Linux 提交于
Now that we have separate cctl values for M>P and P>M transfers, we can avoid calculating the cctl value each time we prepare a transaction. Move the bus selection and increment setting to the slave configuration and initialization functions. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Russell King - ARM Linux 提交于
Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Russell King - ARM Linux 提交于
Store the source/destination cctl values into the channel structure. This moves us towards being able to avoid a configuration call each time we use the channel. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Russell King - ARM Linux 提交于
Store the source/destination slave address separately into the channel structure. This moves us towards being able to avoid a configuration call each time we use the channel. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Russell King - ARM Linux 提交于
Clean up debugging when setting up the LLI list. This reduces the amount of output while preserving the information, and makes it easier to read. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Russell King - ARM Linux 提交于
Avoid re-selecting the LLI bus each time we create an LLI. Move it out of the LLI setup loops. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
由 Russell King - ARM Linux 提交于
PL08X_WQ_PERIODMIN and PL08X_MAX_ALLOCS are not used, remove them. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
- 24 2月, 2011 1 次提交
-
-
由 Russell King 提交于
Make Primecell driver probe functions take a const pointer to their ID tables. Drivers should never modify their ID tables in their probe handler. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 31 1月, 2011 2 次提交
-
-
由 Russell King - ARM Linux 提交于
If a transfer is initiated from memory to a peripheral, then data is fetched and the channel is marked busy. This busy status persists until the HALT bit is set and the queued data has been transfered to the peripheral. Waiting indefinitely after setting the HALT bit results in system lockups. Timeout this operation, and print an error when this happens. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
由 Russell King - ARM Linux 提交于
If we try to pause a channel when terminating a transfer, we could end up spinning for it to become inactive indefinitely, and can result in an uninterruptible wait requiring a reset to recover from. Terminating a transfer is supposed to take effect immediately, but may result in data loss. To make this clear, rename the function to pl08x_terminate_phy_chan(). Also, make sure it is always consistently called - with the spinlock held and IRQs disabled, and ensure that the TC and ERR interrupt status is always cleared. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
- 17 1月, 2011 1 次提交
-
-
由 Russell King - ARM Linux 提交于
Cleanup the formatting of comments, remove some which don't make sense anymore. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> [fix conflict with 96a608a4] Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-
- 05 1月, 2011 1 次提交
-
-
由 Russell King - ARM Linux 提交于
Prevent dma_set_runtime_config() being used to alter the configuration supplied by the platform for memcpy channel configuration. No one should be trying to change this configuration. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
-