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  1. 28 2月, 2015 1 次提交
  3. 13 2月, 2015 11 次提交
  5. 12 2月, 2015 1 次提交
  7. 11 2月, 2015 22 次提交
  9. 10 2月, 2015 5 次提交
    • L
      tools/power turbostat: update parameters, documentation · d8af6f5f
      由 Len Brown 提交于 
      Long format options added, though the short ones should still work.
eg. the new "--Counter 0x10" is the same as the old "-C 0x10"

Note this Incompatibility:
Old:
-v displayed verbose debug output

New:
-v and --version simpaly display version

Additional parameters:
-d and --debug display verbose debug output
-h and --help display a help message

Updated turbosat.8 man page accordingly.
Signed-off-by: NLen Brown <len.brown@intel.com>
      d8af6f5f
    • L
      tools/power turbostat: Skip printing disabled package C-states · ee7e38e3
      由 Len Brown 提交于 
      Replaced previously open-coded Package C-state Limit decoding
with table-driven decoding.  In doing so, updated to match January 2015
"Intel(R) 64 and IA-23 Architectures Software Developer's Manual".

In the past, turbostat would print package C-state residency columns
for all package states supported by the model's architecture, even though
a particular SKU may not support them, or they may be disabled by the BIOS.
Now turbostat will skip printing colunns if MSRs indicate that they are not enabled.
eg. many SKUs don't support PC7, and so that column will no longer be printed.
Signed-off-by: NLen Brown <len.brown@intel.com>
      ee7e38e3
    • L
      tools/power turbostat: relax dependency on APERF_MSR · a729617c
      由 Len Brown 提交于 
      While turbostat is significantly less useful on systems
with no APERF_MSR, it seems more friendly
to run on such systems and report what we can,
rather than refusing to run.

Update man page to reflect recent changes.
Signed-off-by: NLen Brown <len.brown@intel.com>
      a729617c
    • L
      tools/power turbostat: relax dependency on invariant TSC · d7899447
      由 Len Brown 提交于 
      Turbostat can be useful on systems that do not support invariant TSC,
so allow it to run on those systgems.

All arithmetic in turbostat using the TSC value is per-processsor,
so it does not depend on the TSC values being in sync acrosss processors.

Turbostat uses gettimeofday() for the measurement interval
rather than using the TSC directly, so that key metric
is also immune from variable TSC.

Turbostat prints a TSC sanity check column:

TSC_MHz = TSC_delta/interval

If this column is constant and is close to the processor
base frequency, then the TSC is behaving properly.

The other key turbostat columns are calculated this way:

Avg_Mhz = APERF_delta/interval

%Busy = MPERF_delta/TSC_delta

Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/interval

Tested on Core2 and Core2-Xeon, and so this patch includes
a few other changes to remove the assumption that target
systems are Nehalem and newer.
Signed-off-by: NLen Brown <len.brown@intel.com>
      d7899447
    • L
      tools/power turbostat: decode MSR_*_PERF_LIMIT_REASONS · 3a9a941d
      由 Len Brown 提交于 
      The Processor generation code-named Haswell
added MSR_{CORE | GFX | RING}_PERF_LIMIT_REASONS
to explain when and how the processor limits frequency.

turbostat -v
will now decode these bits.

Each MSR has an "Active" set of bits which describe
current conditions, and a "Logged" set of bits,
which describe what has happened since last cleared.

Turbostat currently doesn't clear the log bits.
Signed-off-by: NLen Brown <len.brown@intel.com>
      3a9a941d