1. 26 7月, 2008 1 次提交
    • M
      gpiolib: allow user-selection · 7444a72e
      Michael Buesch 提交于
      This patch adds functionality to the gpio-lib subsystem to make it
      possible to enable the gpio-lib code even if the architecture code didn't
      request to get it built in.
      
      The archtitecture code does still need to implement the gpiolib accessor
      functions in its asm/gpio.h file.  This patch adds the implementations for
      x86 and PPC.
      
      With these changes it is possible to run generic GPIO expansion cards on
      every architecture that implements the trivial wrapper functions.  Support
      for more architectures can easily be added.
      Signed-off-by: NMichael Buesch <mb@bu3sch.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Cc: David Brownell <david-b@pacbell.net>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Jean Delvare <khali@linux-fr.org>
      Cc: Samuel Ortiz <sameo@openedhand.com>
      Cc: Kumar Gala <galak@gate.crashing.org>
      Cc: Sam Ravnborg <sam@ravnborg.org>
      Cc: Adrian Bunk <bunk@stusta.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      7444a72e
  2. 25 7月, 2008 1 次提交
    • R
      powerpc/pseries: iommu enablement for CMO · 6490c490
      Robert Jennings 提交于
      To support Cooperative Memory Overcommitment (CMO), we need to check
      for failure from some of the tce hcalls.
      
      These changes for the pseries platform affect the powerpc architecture;
      patches for the other affected platforms are included in this patch.
      
      pSeries platform IOMMU code changes:
       * platform TCE functions must handle H_NOT_ENOUGH_RESOURCES errors and
         return an error.
      
      Architecture IOMMU code changes:
       * Calls to ppc_md.tce_build need to check return values and return
         DMA_MAPPING_ERROR for transient errors.
      
      Architecture changes:
       * struct machdep_calls for tce_build*_pSeriesLP functions need to change
         to indicate failure.
       * all other platforms will need updates to iommu functions to match the new
         calling semantics; they will return 0 on success.  The other platforms
         default configs have been built, but no further testing was performed.
      Signed-off-by: NRobert Jennings <rcj@linux.vnet.ibm.com>
      Acked-by: NOlof Johansson <olof@lixom.net>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6490c490
  3. 22 7月, 2008 3 次提交
  4. 17 7月, 2008 6 次提交
  5. 14 7月, 2008 2 次提交
  6. 13 7月, 2008 3 次提交
  7. 26 6月, 2008 2 次提交
  8. 18 6月, 2008 1 次提交
    • J
      powerpc/4xx: Workaround for PPC440EPx/GRx PCI_28 Errata · 5ce4b596
      Josh Boyer 提交于
      The 440EPx/GRx chips don't support PCI MRM commands.  Drivers determine this
      by looking for a zero value in the PCI cache line size register.  However,
      some drivers write to this register upon initialization.  This can cause
      MRMs to be used on these chips, which may cause deadlocks on PLB4.
      
      The workaround implemented here introduces a new indirect_type flag, called
      PPC_INDIRECT_TYPE_BROKEN_MRM.  This is set in the pci_controller structure in
      the pci fixup function for 4xx PCI bridges by determining if the bridge is
      compatible with 440EPx/GRx.  The flag is checked in the indirect_write_config
      function, and forces any writes to the PCI_CACHE_LINE_SIZE register to be
      zero, which will disable MRMs for these chips.
      
      A similar workaround has been tested by AMCC on various PCI cards, such as
      the Silicon Image ATA card and Intel E1000 GIGE card.  Hangs were seen with
      the Silicon Image card, and MRMs were seen on the bus with a PCI analyzer.
      With the workaround in place, the card functioned properly and only Memory
      Reads were seen on the bus with the analyzer.
      Acked-by: NStefan Roese <sr@denx.de>
      Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
      5ce4b596
  9. 12 6月, 2008 1 次提交
  10. 11 6月, 2008 3 次提交
  11. 10 6月, 2008 3 次提交
  12. 09 6月, 2008 4 次提交
  13. 07 6月, 2008 1 次提交
  14. 03 6月, 2008 5 次提交
  15. 29 5月, 2008 2 次提交
    • J
      [POWERPC] 4xx: Fix compiler warning on DCR_NATIVE only builds · 0723abd0
      Josh Boyer 提交于
      With the recent DCR code rework, we get a compiler warning about
      find_dcr_parent being defined but not used.  This fixes it by only defining
      the function if CONFIG_PPC_DCR_MMIO is set.
      Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
      0723abd0
    • S
      [POWERPC] Refactor DCR code · b786af11
      Stephen Neuendorffer 提交于
      Previously, DCR support was configured at compile time to either use
      MMIO or native dcr instructions.  Although this works for most
      platforms, it fails on FPGA platforms:
      
      1) Systems may include more than one DCR bus.
      2) Systems may be native DCR capable and still use memory mapped DCR interface.
      
      This patch provides runtime support based on the device trees for the
      case where CONFIG_PPC_DCR_MMIO and CONFIG_PPC_DCR_NATIVE are both
      selected.  Previously, this was a poorly defined configuration, which
      happened to provide NATIVE support.  The runtime selection is made
      based on the dcr-controller having a 'dcr-access-method' attribute
      in the device tree.  If only one of the above options is selected,
      then the code uses #defines to select only the used code in order to
      avoid introducing overhead in existing usage.
      Signed-off-by: NStephen Neuendorffer <stephen.neuendorffer@xilinx.com>
      Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
      b786af11
  16. 23 5月, 2008 2 次提交