1. 08 8月, 2016 1 次提交
    • A
      ASoC: da7213: Refactor sysclk(), pll() functions to improve handling · 4c75225a
      Adam Thomson 提交于
      Currently the handling of the PLL in the driver is a little clunky,
      and not ideal for all modes. This patch updates the code to make it
      cleaner and more sensible for the various PLL states.
      
      Key items of note are:
       - MCLK squaring is now handled directly as part of the sysclk()
         function, removing the need for a private flag to set this feature.
       - All PLL modes are defined as an enum, and are handled as a case
         statement in pll() function to clean up configuration. This also
         removes any need for a private flag for SRM.
       - For 32KHz mode, checks are made on codec master mode and correct
         MCLK rates, to avoid incorrect usage of PLL for this operation.
       - For 32KHz mode, SRM flag now correctly enabled and fout set to
         sensible value to achieve appropriate PLL dividers.
      Signed-off-by: NAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      4c75225a
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