OMAP35x and OMAP37x mentions in the McSPI End-of-Transfer Sequences section
that if the McSPI is configured as a Master and only DMA RX is being
performed then the DMA transfer size needs to be reduced by 1 or 2.

This was originally implemented by:
commit 57c5c28d ("spi: omap2_mcspi rxdma bugfix")

This patch adds comments to clarify what is going on in the code since its
not obvious what problem its addressing.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

PTR_ERR should access the value just tested by IS_ERR.

The semantic patch that makes this change is available
in scripts/coccinelle/tests/odd_ptr_err.cocci.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Even if DMA support is disabled code using DMA mapping APIs compiles fine,
but fails in linking.
-------
drivers/built-in.o: In function `ring_desc_ring_free':
spi-pic32-sqi.c:(.text+0x2cfbe0): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cfbe4): undefined reference to `bad_dma_ops'
drivers/built-in.o: In function `pic32_sqi_probe':
spi-pic32-sqi.c:(.text+0x2cfe48): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cfeb0): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cff38): undefined reference to `bad_dma_ops'
--------
Correct dependency by adding 'depends on HAS_DMA' in Kconfig.
Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NMark Brown <broonie@kernel.org>

Current code does not use ctldata at all, so remove spi_set_ctldata call.

spi_setup() will set spi->bits_per_word = 8 if it was not set, so remove
!spi->max_speed_hz checking.

The spi core allows absent of spi->max_speed_hz setting, if it was not set
spi_setup() assigns spi->master->max_speed_hz to it.

spi core allows spi->max_speed_hz > spi->master->max_speed_hz, in this case
spi core will limit the transfer speed to ensure xfer->speed_hz won't
greater than spi->master->max_speed_hz so remove checking if
spi->max_speed_hz is higher than spi->master->max_speed_hz.

As a result, both pic32_sqi_setup() and pic32_sqi_cleanup() can be removed.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This fixes a simple typo in one of the comments.
Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

We were calling dma_release_channel(rs->dma_tx.ch) when "rs->dma_tx.ch"
is potentially NULL.  There is actually a call to that in the unwind
code at the bottom of the function so we can just re-arrange this a bit
and remove the call.  Also there is no need to set rs->dma_tx.ch to
NULL on this error path.

Fixes: e4c0e06f ('spi: rockchip: fix probe deferral handling')
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The if pclk enable fails the refclk is not disabled.
Fix the same.
Signed-off-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The relaxed I/O accessors are available on all architectures now.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Release memory allocated for spi master by calling spi_master_put in
.remove function.
Signed-off-by: NPramod Gurav <pramod.gurav@linaro.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Clocks must ne disabled in pm_runtime to achieve some power saving.
Enable the clocks when the device is runtime resumed during a transfer.
Signed-off-by: NPramod Gurav <pramod.gurav@linaro.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

There is no build dependency for this driver, so enable COMPILE_TEST to get
better build coverage.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

With the new dma_request_chan() the client driver does not need to look for
the DMA resource and it does not need to pass filter_fn anymore.
By switching to the new API the driver can now support deferred probing
against DMA.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

With the new dma_request_chan() the client driver does not need to look for
the DMA resource and it does not need to pass filter_fn anymore.
By switching to the new API the driver can now support deferred probing
against DMA.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

devm_ioremap_resource() returns ERR_PTR on error.
Also remove the redundant dev_err message, the implementation of
devm_ioremap_resource() already print error messages on error paths.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

It's done by spi_alloc_master().
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This driver only supports 8/16/32 bits_per_word, so set
master->bits_per_word_mask accordingly. With this change, we can remove
the spi->bits_per_word checking in pic32_spi_setup as it's done by spi
core.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Certain Intel Sunrisepoint PCH variants report zero chip selects in SPI
capabilities register even they have one per port. Detection in
pxa2xx_spi_probe() sets master->num_chipselect to 0 leading to -EINVAL
from spi_register_master() where chip select count is validated.

Fix this by not using SPI capabilities register on Sunrisepoint. They don't
have more than one chip select so use the default value 1 instead of
detection.

Fixes: 8b136baa ("spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals")
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

Current spi_map_buf() implementation supports creates sg_table for
vmalloc'd and kmalloc'd buffers. Therefore return error if kmap'd buffer
(or any other buffer) is passed to spi_map_buf().
Signed-off-by: NVignesh R <vigneshr@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

We read one element beyond the end of the array when we access
"rdesc[i + 1]" so it causes a static checker warning.  It's harmless
because we write over it again on the next line.  But let's just silence
the warning.
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: NPurna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The SPI controller managed by the spi-orion is used on the new ARM64
Marvell Armada 7K/8K SoCs. In order to allow this driver to be built
for this platform, we allow it to be selected for ARCH_MVEBU=y
configurations.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This flag is a no-op now (see commit 47b0eeb3 "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.

Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

This driver implements SPI master interface for Quad SPI
controller, specifically for accessing quad SPI flash.
It uses descriptor-based DMA transfer mode and supports
half-duplex communication for single, dual and quad SPI
transactions.
Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com>
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

This implements more efficient reads of SPI-attached flash content.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The newly added runtime PM support for the cadence spi driver
causes harmless warnings when PM is disabled:

drivers/spi/spi-cadence.c:681:12: warning: 'cnds_runtime_suspend' defined but not used
drivers/spi/spi-cadence.c:652:12: warning: 'cnds_runtime_resume' defined but not used

This adds __maybe_unused annotations to the respective functions
to shut up the warnings, while leaving the code in place for
compile testing and avoiding ugly #ifdefs.

Fixes: d36ccd9f ("spi: cadence: Runtime pm adaptation")
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This allows defining SPI devices connected to a DLN2 using devicetree.

This already works for i2c because of a similar patch:
3b10db23: i2c: dln2: set the device tree node of the adapter
Signed-off-by: NCrestez Dan Leonard <leonard.crestez@intel.com>
Acked-by: NLaurentiu Palcu <laurentiu.palcu@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The source and destination masters are reflecting buses or their layers to
where the different devices can be connected. The patch changes the master
names to reflect which one is related to which independently on the transfer
direction.

The outcome of the change is that the memory data width is now always limited
by a data width of the master which is dedicated to communicate to memory.

The patch will not break anything since all current users have the same data
width for all masters. Though it would be nice to revisit avr32 platforms to
check what is the actual hardware topology in use there. It seems that it has
one bus and two masters on it as stated by Table 8-2, that's why everything
works independently on the master in use. The purpose of the sequential patch
is to fix the driver for configuration of more than one bus.

The change is done in the assumption that src_master and dst_master are
reflecting a connection to the memory and peripheral correspondently on avr32
and otherwise on the rest.
Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: NMark Brown <broonie@kernel.org>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

We clamp frame_len_words to a maximum of 4096, but do not actually
limit the number of words written or read through the DATA registers
or the length added to spi_message::actual_length.  This results in
silent data corruption for commands longer than this maximum.

Recalculate the length of each transfer, taking frame_len_words into
account.  Use this length in qspi_{read,write}_msg(), and to increment
spi_message::actual_length.
Signed-off-by: NBen Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: NMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

Each transfer can specify 8, 16 or 32 bits per word independently of
the default for the device being addressed.  However, currently we
calculate the number of words in the frame assuming that the word size
is the device default.

If multiple transfers in the same message have differing
bits_per_word, we bitwise-or the different values in the WLEN register
field.

Fix both of these.  Also rename 'frame_length' to 'frame_len_words' to
make clear that it's not a byte count like spi_message::frame_length.
Signed-off-by: NBen Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: NMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

Let all SPI masters ignore their children: when it comes
to power management: SPI children have no business doing
keeping their parents awake: they are completely autonomous
devices that just use their parent to talk, and the latter
usecase must be power managed by the host itself on a
per-message basis.
Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

This reverts commit 3525e0aa.

The DMA transfer for RX buffer was not handled correctly in this change.

The actual transfer length for DMA RX can be less than xfer->len in the
specific condition and the last words will be filled after the DMA
completion, but the commit doesn't consider it and the dmaengine is
started with rx_sg mapped by spi core.

The solution for this at least requires more lines than this commit
has inserted.  So revert it for now.
Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

No functional change.
Fixing some style related issues

CHECK: multiple assignments should be avoided
+	new_ctrl_reg = ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR);

CHECK: Alignment should match open parenthesis
+static void cdns_spi_config_clock_freq(struct spi_device *spi,
+				  struct spi_transfer *transfer)

CHECK: Please use a blank line after function/struct/union/enum declarations
+}
+static int cdns_prepare_message(struct spi_master *master,
Signed-off-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

There are use cases when chip select should be triggered between transfers
in single SPI message. Current implementation does this only on last
transfer in message ignoring cs_change value provided in current transfer.
Signed-off-by: NAndrey Vostrikov <andrey.vostrikov@cogentembedded.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Return the error code for cdns_spi_suspend and cdns_spi_resume.
Also fixes a comment where which claims that the error code is
returned.
Signed-off-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Now that the clocks are enabled and disabled per transaction
, remove the clock enable and disable from resume and suspend
hooks.
Signed-off-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Currently the clocks are enabled at probe and disabled
at remove. This patch moves the clock enable to the
start of transaction and disables at the end.
Signed-off-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

cdns_spi_chipselect has parameter is_high however the comment
describes it as is_on.
Also fixes the below warning.
drivers/spi/spi-cadence.c:182: warning: No description found for
parameter 'is_high'
drivers/spi/spi-cadence.c:182: warning: Excess function parameter 'is_on'
description in 'cdns_spi_chipselect'
Signed-off-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The clock disabling is missed out in some
error cases at probe. Fix the same.
Signed-off-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Remove the _MASK and _OFFSET from the macros.
It improves readability, removes some checkpatch
error for exceeding 80 chars  and also prevents some
linebreaks.
Signed-off-by: NShubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: NMark Brown <broonie@kernel.org>