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  1. 27 6月, 2013 1 次提交
  3. 26 6月, 2013 1 次提交
    • A
      drm/radeon: add a reset work handler · 8f61b34c
      由 Alex Deucher 提交于 
      New asics support non-privileged IBs.  This allows us
to skip IB checking in the driver since the hardware
will check the command buffers for us.  When using
non-privileged IBs, if the CP encounters an illegal
register in the command stream, it will halt and generate
an interrupt.  The CP needs to be reset to continue.  For now
just do a full GPU reset when this happens.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      8f61b34c
  5. 18 3月, 2013 1 次提交
  7. 08 3月, 2013 1 次提交
  9. 03 10月, 2012 1 次提交
  11. 27 9月, 2012 2 次提交
  13. 21 9月, 2012 1 次提交
  15. 21 8月, 2012 1 次提交
    • T
      workqueue: deprecate flush[_delayed]_work_sync() · 43829731
      由 Tejun Heo 提交于 
      flush[_delayed]_work_sync() are now spurious.  Mark them deprecated
and convert all users to flush[_delayed]_work().

If you're cc'd and wondering what's going on: Now all workqueues are
non-reentrant and the regular flushes guarantee that the work item is
not pending or running on any CPU on return, so there's no reason to
use the sync flushes at all and they're going away.

This patch doesn't make any functional difference.
Signed-off-by: NTejun Heo <tj@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Mattia Dongili <malattia@linux.it>
Cc: Kent Yoder <key@linux.vnet.ibm.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Karsten Keil <isdn@linux-pingi.de>
Cc: Bryan Wu <bryan.wu@canonical.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Alasdair Kergon <agk@redhat.com>
Cc: Mauro Carvalho Chehab <mchehab@infradead.org>
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: linux-wireless@vger.kernel.org
Cc: Anton Vorontsov <cbou@mail.ru>
Cc: Sangbeom Kim <sbkim73@samsung.com>
Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Eric Van Hensbergen <ericvh@gmail.com>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Steven Whitehouse <swhiteho@redhat.com>
Cc: Petr Vandrovec <petr@vandrovec.name>
Cc: Mark Fasheh <mfasheh@suse.com>
Cc: Christoph Hellwig <hch@infradead.org>
Cc: Avi Kivity <avi@redhat.com>
      43829731
  17. 18 7月, 2012 1 次提交
  19. 21 6月, 2012 2 次提交
  21. 24 4月, 2012 1 次提交
  23. 16 4月, 2012 1 次提交
  25. 23 1月, 2012 1 次提交
  27. 21 12月, 2011 1 次提交
  29. 04 11月, 2011 4 次提交
  31. 02 11月, 2011 1 次提交
  33. 24 1月, 2011 1 次提交
  35. 06 1月, 2011 1 次提交
    • T
      drm/radeon: use system_wq instead of dev_priv->wq · 32c87fca
      由 Tejun Heo 提交于 
      With cmwq, there's no reason for radeon to use a dedicated workqueue.
Drop dev_priv->wq and use system_wq instead.

Because radeon_driver_irq_uninstall_kms() may be called from
unsleepable context, the work items can't be flushed from there.
Instead, init and flush from radeon_irq_kms_init/fini().

While at it, simplify canceling/flushing of rdev->pm.dynpm_idle_work.
Always initialize and sync cancel instead of being unnecessarily smart
about it.
Signed-off-by: NTejun Heo <tj@kernel.org>
Acked-by: NAlex Deucher <alexdeucher@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: NDave Airlie <airlied@redhat.com>
      32c87fca
  37. 23 11月, 2010 1 次提交
  39. 22 11月, 2010 1 次提交
  41. 20 8月, 2010 1 次提交
  43. 18 5月, 2010 2 次提交
    • A
      drm/radeon/kms: add support for gui idle interrupts (v4) · 2031f77c
      由 Alex Deucher 提交于 
      Useful for certain power management operations.  You
need to wait for the GUI engine (2D, 3D, CP, etc.) to be
idle before changing clocks or adjusting engine parameters.

(v2) Fix gui idle enable on pre-r6xx asics

(v3) The gui idle interrrupt status bit is permanently asserted
on pre-r6xx chips, but the interrrupt is still generated.
workaround it in the driver.

(v4) Add support for evergreen
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>
      2031f77c
    • D
      drm/fbdev: rework output polling to be back in the core. (v4) · eb1f8e4f
      由 Dave Airlie 提交于 
      After thinking it over a lot it made more sense for the core to deal with
the output polling especially so it can notify X.

v2: drop plans for fake connector - per Michel's comments - fix X patch sent to xorg-devel, add intel polled/hpd setting, add initial nouveau polled/hpd settings.

v3: add config lock take inside polling, add intel/nouveau poll init/fini calls

v4: config lock was a bit agressive, only needed around connector list reading.
otherwise it could re-enter.

glisse: discard drm_helper_hpd_irq_event

v3: Reviewed-by: Michel Dänzer <michel@daenzer.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>
      eb1f8e4f
  45. 07 4月, 2010 2 次提交
    • D
      drm/kms/fb: add polling support for when nothing is connected. · 5c4426a7
      由 Dave Airlie 提交于 
      When we are running in a headless environment we have no idea what
output the user might plug in later, we only have hotplug detect
from the digital outputs. So if we detect no connected outputs at
initialisation, start a slow work operation to poll every 5 seconds
for an output.

this is only hooked up for radeon so far, on hw where we have full
hotplug detection there is no need for this.
Signed-off-by: NDave Airlie <airlied@redhat.com>
      5c4426a7
    • D
      drm/fb: fix fbdev object model + cleanup properly. · 38651674
      由 Dave Airlie 提交于 
      The fbdev layer in the kms code should act like a consumer of the kms services and avoid having relying on information being store in the kms core structures in order for it to work.

This patch

a) removes the info pointer/psuedo palette from the core drm_framebuffer structure and moves it to the fbdev helper layer, it also removes the core drm keeping a list of kernel kms fbdevs.
b) migrated all the fb helper functions out of the crtc helper file into the fb helper file.
c) pushed the fb probing/hotplug control into the driver
d) makes the surface sizes into a structure for ease of passing
This changes the intel/radeon/nouveau drivers to use the new helper.
Signed-off-by: NDave Airlie <airlied@redhat.com>
      38651674
  47. 31 3月, 2010 2 次提交
  49. 25 3月, 2010 1 次提交
    • C
      PCI quirk: RS780/RS880: work around missing MSI initialization · a5ee4eb7
      由 Clemens Ladisch 提交于 
      AMD says in section 2.5.4 (GFX MSI Enable) of #43291 (AMD 780G Family
Register Programming Requirements):

  The SBIOS must enable internal graphics MSI capability in GCCFG by
  setting the following: NBCFG.NB_CNTL.STRAP_MSI_ENABLE='1'

Quite a few BIOS writers misinterpret this sentence and think that
enabling MSI is an optional feature.  However, clearing that bit just
prevents delivery of MSI messages but does not remove the MSI PCI
capabilities registers, and so leaves these devices unusable for any
driver that attempts to use MSI.

Setting that bit is not possible after the BIOS has locked down the
configuration registers, so we have to manually disable MSI for the
affected devices.

This fixes the codec communication errors in the HDA driver when
accessing the HDMI audio device, and allows us to get rid of the
overcautious quirk in radeon_irq_kms.c.
Signed-off-by: NClemens Ladisch <clemens@ladisch.de>
Tested-by: NAlex Deucher <alexdeucher@gamil.com>
Cc: <stable@kernel.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      a5ee4eb7
  51. 08 1月, 2010 1 次提交
  53. 08 12月, 2009 1 次提交
  55. 02 12月, 2009 2 次提交
    • D
      drm/radeon/kms: add irq mitigation code for sw interrupt. · 1614f8b1
      由 Dave Airlie 提交于 
      We really don't need to process every irq that comes in, we only
really want to do SW irq processing when we are actually waiting for
a fence to pass. I'm not 100% sure this is race free esp on non-MSI systems
so it needs some testing.
Signed-off-by: NDave Airlie <airlied@redhat.com>
      1614f8b1
    • A
      drm/radeon/kms: Add support for interrupts on r6xx/r7xx chips (v3) · d8f60cfc
      由 Alex Deucher 提交于 
      This enables the use of interrupts on r6xx/r7xx hardware.
Interrupts are implemented via a ring buffer.  The GPU adds
interrupts vectors to the ring and the host reads them off
in the interrupt handler.  The interrupt controller requires
firmware like the CP.  This firmware must be installed and
accessble to the firmware loader for interrupts to function.

MSIs don't seem to work on my RS780.  They work fine on all
my discrete cards.  I'm not sure about other RS780s or
RS880s.  I've disabled MSIs on RS780 and RS880, but it would
probably be worth checking on some other systems.

v2 - fix some checkpatch.pl problems;
     re-read the disp int status reg if we restart the ih;

v3 - remove the irq handler if r600_irq_init() fails;
     remove spinlock in r600_ih_ring_fini();
     move ih rb overflow check to r600_get_ih_wptr();
     move irq ack to separate function;
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>
      d8f60cfc
  57. 26 10月, 2009 1 次提交
  59. 05 10月, 2009 1 次提交
  61. 31 8月, 2009 1 次提交
    • B
      radeon: Use request_firmware() · 70967ab9
      由 Ben Hutchings 提交于 
      Loosely based on a patch by
Jaswinder Singh Rajput <jaswinderlinux@gmail.com>.

KMS support by Dave Airlie <airlied@redhat.com>.

For Radeon 100- to 500-series, firmware blobs look like:
    struct {
        __be32 datah;
        __be32 datal;
    } cp_ucode[256];

For Radeon 600-series, there are two separate firmware blobs:
    __be32 me_ucode[PM4_UCODE_SIZE * 3];
    __be32 pfp_ucode[PFP_UCODE_SIZE];

For Radeon 700-series, likewise:
    __be32 me_ucode[R700_PM4_UCODE_SIZE];
    __be32 pfp_ucode[R700_PFP_UCODE_SIZE];
Signed-off-by: NBen Hutchings <ben@decadent.org.uk>
Signed-off-by: NDave Airlie <airlied@redhat.com>
      70967ab9