- 08 12月, 2011 7 次提交
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由 David Daney 提交于
This patch addresses a couple of related problems: 1) The kernel may reside in physical memory outside of the ranges set by plat_mem_setup(). If this is the case, init mem cannot be reused as it resides outside of the range of pages that the kernel memory allocators control. 2) initrd images might be loaded in physical memory outside of the ranges set by plat_mem_setup(). The memory likewise cannot be reused. The patch doesn't handle this specific case, but the infrastructure is useful for future patches that do. The crux of the problem is that there are memory regions that need be memory_present(), but that cannot be free_bootmem() at the time of arch_mem_init(). We create a new type of memory (BOOT_MEM_INIT_RAM) for use with add_memory_region(). Then arch_mem_init() adds the init mem with this type if the init mem is not already covered by existing ranges. When memory is being freed into the bootmem allocator, we skip the BOOT_MEM_INIT_RAM ranges so they are not clobbered, but we do signal them as memory_present(). This way when they are later freed, the necessary memory manager structures have initialized and the Sparse allocater is prevented from crashing. The Octeon specific code that handled this case is removed, because the new general purpose code handles the case. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1988/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
OCTEON II has a new dma to phys mapping method for PCIe. Define OCTEON_DMA_BAR_TYPE_PCIE2 to denote this case, and handle it. OCTEON II also needs a swiotlb if the OHCI USB driver is enabled, so allocate this too. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2983/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org Acked-by: NGreg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2941/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Many new types of boards exist, so lets recognize them. Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org Acked-by: NGreg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2940/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org Acked-by: NGreg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2942/ Patchwork: https://patchwork.linux-mips.org/patch/3012/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Several newer chips were not covered, update the code to detect them. This necessitates updating cvmx-mio-defs.h as well, because it has new and required definitions. Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2939/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
Panic() invokes printk() to add a \n internally, so panic arguments should not themselves end in \n. Panic invocations in arch/mips and elsewhere are inconsistently sometimes terminating in \n, sometimes not. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 11月, 2011 1 次提交
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由 David Daney 提交于
The parse_mtd_partitions() and mtd_device_register() functions were combined into mtd_device_parse_register(). So call that instead. Signed-off-by: NDavid Daney <david.daney@cavium.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2923/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 08 11月, 2011 1 次提交
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由 Venkat Subbiah 提交于
This is to exclude it from force threading to allow RT patch set to work. And while on this line * Remove IRQF_DISABLED as as this flag is NOOP * Add IRQF_PERCPU as this is a per cpu interrupt. Signed-off-by: NVenkat Subbiah <venkat.subbiah@cavium.com> Acked-by: NDavid Daney <david.daney@cavium.com> To: linux-mips@linux-mips.org To: linux-rt-users@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2817/Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 01 11月, 2011 1 次提交
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由 Paul Gortmaker 提交于
Or else we get lots of variations on this: arch/mips/pci/pci.c:330: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' scattered throughout the build. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 25 5月, 2011 1 次提交
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由 Jamie Iles 提交于
Convert to mtd_device_register() and remove the CONFIG_MTD_PARTITIONS preprocessor conditionals as partitioning is always available. Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 19 5月, 2011 2 次提交
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由 David Daney 提交于
We only use the three low-order mailbox bits. Leave the upper bits alone for possible use by drivers and other software. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2090/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Chandrakala Chavva 提交于
Octeon uses different interrupt irq for timer and performance counters. Set CvmCtl[IPPCI] to correct irq value very early. Signed-off-by: NChandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: Chandrakala Chavva <cchavva@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/2085/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 5月, 2011 1 次提交
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由 David Daney 提交于
Instead of making each Octeon specific option depend on CPU_CAVIUM_OCTEON, gate the body of the entire file with CPU_CAVIUM_OCTEON. With this change, CAVIUM_OCTEON_SPECIFIC_OPTIONS becomes useless, so get rid of it as well. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2091/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 14 4月, 2011 1 次提交
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由 Peter Zijlstra 提交于
For future rework of try_to_wake_up() we'd like to push part of that function onto the CPU the task is actually going to run on. In order to do so we need a generic callback from the existing scheduler IPI. This patch introduces such a generic callback: scheduler_ipi() and implements it as a NOP. BenH notes: PowerPC might use this IPI on offline CPUs under rare conditions! Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NMartin Schwidefsky <schwidefsky@de.ibm.com> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Acked-by: NJesper Nilsson <jesper.nilsson@axis.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Reviewed-by: NFrank Rowand <frank.rowand@am.sony.com> Cc: Mike Galbraith <efault@gmx.de> Cc: Nick Piggin <npiggin@kernel.dk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/20110405152728.744338123@chello.nl
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 29 3月, 2011 2 次提交
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由 Thomas Gleixner 提交于
Make use of the IRQCHIP_ONOFFLINE_ENABLED flag and remove the wrappers. Use irqd_irq_disabled() instead of desc->status, which will go away. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Tested-by: NDavid Daney <ddaney@caviumnetworks.com>
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由 David Daney 提交于
This includes conversion to new style irq_chip functions, and correctly enabling/disabling per-CPU interrupts. The hardware interrupt bit to irq number mapping is now done with a flexible map, instead of by bit twiddling the irq number. [ tglx: Adjusted to new irq_cpu_on/offline callbacks and __irq_set_affinity_lock ] Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: ralf@linux-mips.org LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 22 2月, 2011 1 次提交
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由 John Stultz 提交于
This converts the mips clocksources to use clocksource_register_hz/khz CC: Ralf Baechle <ralf@linux-mips.org> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NJohn Stultz <johnstul@us.ibm.com>
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- 30 10月, 2010 9 次提交
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由 David Daney 提交于
Declare that OCTEON reference boards have both OHCI and EHCI. Add platform devices for the corresponding hardware. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-usb@vger.kernel.org To: dbrownell@users.sourceforge.net Patchwork: http://patchwork.linux-mips.org/patch/1676/Acked-by: NGreg Kroah-Hartman <gregkh@suse.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The CN63XXP1 needs a couple of workarounds to ensure memory is not written in unexpected ways. All PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We pass a flag to the assembler to cover compiler generated code, and patch uasm for the dynamically generated code. The write buffer threshold is reduced to 4. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1672/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The I2C and UARTS are clocked by the I/O clock, use its rate for these devices. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1670/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Starting with cn63xx Octeon I/O blocks are clocked at a different rate than the CPU. Add a new function octeon_get_io_clock_rate() that yields the I/O clock rate. Also rearrange octeon_get_clock_rate() to get the value from the saved sysinfo structure. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1671/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
We can run with any simulator clock rate. Get rid of the code overriding it to 6MHz. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1669/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The per-CPU clocks are synchronized from IPD_CLK_COUNT, on cn63XX it must be scaled by the clock frequency ratio. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1667/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The CN63XX has a different L2 cache architecture. Update the helper functions to reflect this. Some joining of split lines was also done to improve readability, as well as reformatting of comments. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1663/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
All Octeon chips can support more than 4GB of RAM. Also due to how Octeon PCI is setup, even some configurations with less than 4GB of RAM will have portions that are not accessible from 32-bit devices. Enable the swiotlb code to handle the cases where a device cannot directly do DMA. This is a complete rewrite of the Octeon DMA mapping code. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1639/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
This allows follow-on patches to dma mapping functions to work with the octeon mgmt device.. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1632/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 07 10月, 2010 1 次提交
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由 David Howells 提交于
Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should really include it. Note that this can replace #inclusions of <asm/irq.h>. This is required for the patch to sort out irqflags handling function naming to compile on MIPS. The problem is that these files require access to things like setup_irq() - which isn't available by #including <linux/interrupt.h> Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NRalf Baechle <ralf@linux-mips.org>
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- 05 10月, 2010 2 次提交
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由 David Daney 提交于
It is an early_initcall, so it should be in __init memory. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1593/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andreas Bießmann 提交于
This patch adds an config switch to determine if we need to build some workaround helper files. The staging driver octeon-ethernet references some symbols which are only built when PCI is enabled. The new config switch enables these symbols in bothe cases. Signed-off-by: NAndreas Bießmann <biessmann@corscience.de> To: linux-kernel@vger.kernel.org Cc: Andreas Bießmann <biessmann@corscience.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1543/Acked-by: NDavid Daney <ddaney@caviumnetworks.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 05 8月, 2010 9 次提交
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由 David Daney 提交于
We reserve the 3.75GB - 4GB region of PCIe address space for device to device transfers, making the corresponding physical memory under direct mapping unavailable for DMA. To allow for PCIe DMA to all physical memory we map this chunk of physical memory with BAR1. Because of the resulting discontinuity in the mapping function, we remove a page of memory at each end of the range so multi-page DMA buffers can never be allocated that span the range. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1535/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The forthcoming watchdog driver will use it. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1499/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Power throttling make deterministic delay loops impossible. Re-implement delays using the cycle counter. This also allows us to get rid of the code that calculates loops per jiffy. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1317/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
* Rename camel-case InitTLBStart_addr to octeon_bootloader_entry_addr. * Convert calls to cvmx_read64_uint32(), to simple pointer dereferences. * Set proper ebase. * Don't confuse coreid and cpu numbers. * Try to maintain consistent bootloader coremask. * Update the signature and boot_init_vector of supported bootloaders. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1491/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1490/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Also number offline CPUs that could potentially be brought on-line later. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1489/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The original version went behind the back of everything, leaving things in an inconsistent state. Now we use the irq_set_affinity() to do the work for us. This has the advantage that the IRQ core's view of the affinity stays consistent. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1486/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The main change is to change most of the IRQs from handle_percpu_irq to handle_fasteoi_irq. This necessitates extracting all the .ack code to common functions that are not exposed to the irq core. The affinity code now acts more sanely, by doing round-robin distribution instead of broadcasting. Because of the change to handle_fasteoi_irq and affinity, some of the IRQs had to be split into separate groups with their own struct irq_chip to prevent undefined operations on specific IRQ lines. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1485/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Put all the MSI code in one place (msi-octeon.c). This simplifies octeon-irq.c and gets rid of some ugly #ifdefs Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1484/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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