- 08 12月, 2011 3 次提交
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由 Florian Fainelli 提交于
Instead of hardcoding the amount of available RAM, read the number of effective multiples of 8MB from SDRAM_MBASE_REG. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3008/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Maxime Bizon 提交于
Signed-off-by: NMaxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2892/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Maxime Bizon 提交于
Use preprocessor when possible to avoid duplicated and error-prone code. Signed-off-by: NMaxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2897/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 30 10月, 2010 1 次提交
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由 Kevin Cernekee 提交于
BMIPS processor cores are used in 50+ different chipsets spread across 5+ product lines. In many cases the chipsets do not share the same peripheral register layouts, the same register blocks, the same interrupt controllers, the same memory maps, or much of anything else. But, across radically different SoCs that share nothing more than the same BMIPS CPU, a few things are still mostly constant: SMP operations Access to performance counters DMA cache coherency quirks Cache and memory bus configuration So, it makes sense to treat each BMIPS processor type as a generic "building block," rather than tying it to a specific SoC. This makes it easier to support a large number of BMIPS-based chipsets without unnecessary duplication of code, and provides the infrastructure needed to support BMIPS-proprietary features. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Cc: mbizon@freebox.fr Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Tested-by: NFlorian Fainelli <ffainelli@freebox.fr> Patchwork: https://patchwork.linux-mips.org/patch/1706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
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- 13 4月, 2010 1 次提交
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由 Maxime Bizon 提交于
The BCm63xx SOC has two uarts. Some boards use the second one for bluetooth. This patch changes platform device registration code to handle this. Changes to the UART driver were already merged in 6a2c7eab. Signed-off-by: NMaxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/900/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 02 11月, 2009 1 次提交
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由 Florian Fainelli 提交于
For consistency with other BCM63xx SoC set the CPU name to "Broadcom BCM6338" when actually running on that system. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 18 9月, 2009 1 次提交
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由 Maxime Bizon 提交于
Signed-off-by: NMaxime Bizon <mbizon@freebox.fr> Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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