1. 24 9月, 2010 1 次提交
    • S
      davinci: introduce support for AM1x ARM9 microprocessors · 48ea89ea
      Sekhar Nori 提交于
      The Sitara AM17x SoCs from TI are an OMAP-L137 pin-to-pin
      compatible ARM9 microprocessor offering from TI.
      
      The Sitara AM18x SoCs from TI are an OMAP-L138 pin-to-pin
      compatible ARM9 microprocessor offering from TI.
      
      More information about these processors available at:
      www.ti.com/am1x
      
      Because of their compatibiliy with OMAP-L1x, the kernel
      support for OMAP-L1x is fully relevant to AM1x processors.
      
      This patch updates the Kconfig prompt and help text to include
      the AM1x part names to help users select configurations required
      for these parts easily.
      
      Also, the hardware information that shows up in /proc/cpuinfo
      is updated to show applicability of the respective OMAP-L1x EVMs
      for AM1x parts.
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      48ea89ea
  2. 06 8月, 2010 1 次提交
  3. 20 7月, 2010 1 次提交
    • S
      ASoC: davinci: let platform data define edma queue numbers · 48519f0a
      Sekhar Nori 提交于
      Currently the EDMA queue to be used by for servicing ASP through
      internal RAM is fixed to EDMAQ_0 and that to service internal RAM
      from external RAM is fixed to EDMAQ_1.
      
      This may not be the desirable configuration on all platforms. For
      example, on DM365, queue 0 has large fifo size and is more suitable
      for video transfers. Having audio and video transfers on the same
      queue may lead to starvation on audio side.
      
      platform data as defined currently passes a queue number to the driver
      but that remains unused inside the driver.
      
      Fix this by defining one queue each for ASP and RAM transfers in the
      platform data and using it inside the driver.
      
      Since EDMAQ_0 maps to 0, thats the queue that will be used if
      the asp queue number is not initialized. None of the platforms
      currently utilize ping-pong transfers through internal RAM so that
      functionality remains unchanged too.
      
      This patch has been tested on DM644x and OMAP-L138 EVMs.
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      48519f0a
  4. 14 5月, 2010 1 次提交
    • C
      Davinci: aintc/cpintc - use ioremap() · bd808947
      Cyril Chemparathy 提交于
      This patch implements the following:
      
       - interrupt initialization uses ioremap() instead of passing a virtual address
         via davinci_soc_info.
      
       - machine definitions directly point to cp_intc_init() or davinci_irq_init()
      
       - davinci_intc_type and davinci_intc_base now get initialized in controller
         specific init functions instead of davinci_common_init()
      
       - minor fix in davinci_irq_init() to use intc_irq_num instead of
         DAVINCI_N_AINTC_IRQ
      Signed-off-by: NCyril Chemparathy <cyril@ti.com>
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      bd808947
  5. 07 5月, 2010 5 次提交
  6. 05 2月, 2010 1 次提交
  7. 26 11月, 2009 17 次提交
  8. 26 8月, 2009 5 次提交