The "cpus" node cannot be inside the "soc" node, while this
works for the CoreSight blocks, the early boot code will look
for "cpus" directly under the root node, so this is a hard
convention. So move the CPU nodes.

Augment the "reg" property to match what is actually in the
hardware: 0x300 and 0x301 respectively.

Then add an SMP enablement type to be used by the SMP init
code, "ste,dbx500-smp".
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled
between a SATA DPLL unlock and re-lock to prevent SATA lockup.

Introduce a new DT parameter 'syscon-pllreset' to provide the syscon
regmap access to this register which sits in the control module.

If the register is not provided we fallback to the old behaviour
i.e. SATA DPLL refclk will not be disabled and we prevent SoC low
power states.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>

There is an overlap in dma ring cmd csr region due to sharing of ethernet
ring cmd csr region. This patch fix the resource overlapping by mapping
the entire dma ring cmd csr region.
Signed-off-by: NRameshwar Prasad Sahu <rsahu@apm.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

Fix the clocks property documentation and use lower case for
hex values in the example.
Signed-off-by: NAlban Bedel <albeu@free.fr>
Signed-off-by: NRob Herring <robh@kernel.org>

It's not supported by driver anymore after using runtime pm
and there's no user of it, so delete it now.
Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com>
Reviewed-by: NJohan Derycke <johan.derycke@barco.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The driver is used for rockchip board using a rt5645/rt5650.
Reviewed-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: Nzhengxing <zhengxing@rock-chips.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The driver is used for rockchip board using a max98090.
Reviewed-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: Nzhengxing <zhengxing@rock-chips.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The parallel-display driver used an undocumented, non-standard property
"fsl,panel" to optionally associate with a drm_panel device. This patch
fixes the driver to use the same OF graph bindings as the LDB driver
instead:

    parallel-display {
            compatible = "fsl,imx-parallel-display";
            ...

            port@1 {
                    reg = <1>;

                    parallel_out: endpoint {
                            remote_endpoint = <&panel_in>;
                    };
            };
    };

    panel {
            ...

            port {
                    panel_in: endpoint {
                            remote-endpoint = <&parallel_out>;
                    };
            };
    };
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Tested-by: NGary Bisson <gary.bisson@boundarydevices.com>

This replaces the platform_name in snd_soc_dai_link by device tree node.
Signed-off-by: NKoro Chen <koro.chen@mediatek.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Hisilicon SMMUv3 devices treat CMD_PREFETCH_CONFIG as a illegal command,
execute it will trigger GERROR interrupt. Although the gerror code manage
to turn the prefetch into a SYNC, and the system can continue to run
normally, but it's ugly to print error information.
Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
[will: extended binding documentation]
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Add node for TI AM4372 EMIF. Without this we get a warning with the
recent commit fabbe6df (ARM: OMAP: AM43xx hwmod: Add data for am43xx
emif hwmod).
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Tested-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add machine support for the Allwinner A33 quad core cortex-a7 based SoC,
which is similar to the A23 SoC.
Signed-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: NChen-Yu Tsai <wens@csie.org>

The Allwinner H3 is a quad-core Cortex-A7-based SoC. It is very similar
to other sun8i family SoCs like the A23.
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

To please checkpatch and the tiresome reader, add the "atmel," prefix to the
USB udc compatible string.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: <stable@vger.kernel.org>  #4.0+
Signed-off-by: NKevin Hilman <khilman@linaro.org>

The mvneta driver supports the Ethernet IP found in the Armada 370, XP,
380 and 385 SoCs. Since at least one more hardware feature is available
for the Armada XP SoCs then a way to identify them is needed.

This patch introduces a new compatible string "marvell,armada-xp-neta".
Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
Fixes: c5aff182 ("net: mvneta: driver for Marvell Armada 370/XP network unit")
Cc: <stable@vger.kernel.org> # v3.8+
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>

Sometimes the irq line is not connected to any soc-pin. This does
not hinder basic timekeeping functionality of the rtc, so probe
should not fail in this case.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>

Add support for the Arria10 SDRAM EDAC. Update the bindings document for
the new match string.
Signed-off-by: NThor Thayer <tthayer@opensource.altera.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-5-git-send-email-tthayer@opensource.altera.comSigned-off-by: NBorislav Petkov <bp@suse.de>

To fix it, use the chance to rename according the compatible string,
which is "lantiq,pinctrl-falcon" and  "lantiq,pinctrl-xway"
Signed-off-by: NThomas Langer <thomas.langer@lantiq.com>
Cc: John Crispin <blogic@openwrt.org>
Signed-off-by: NRob Herring <robh@kernel.org>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NRob Herring <robh@kernel.org>

Simple LAN device for debug or management purposes.
Device supports interrupts for RX and TX(completion).
Device does not have DMA ability.
Signed-off-by: NNoam Camus <noamc@ezchip.com>
Signed-off-by: NTal Zilcer <talz@ezchip.com>
Acked-by: NAlexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add constants and callback functions for the dwmac on rk3368 socs.
As can be seen, the base structure is the same, only registers and
the bits in them moved slightly.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add sama5d2 to the biding documentation for this use of the GEM IP.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

On sama5d4, we only have a GEM IP that is configured to do 10/100 Mbits. So the
use of "Gigabit" can be confusing.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

In the driver and the DT bindings we use the "atmel" prefix. Fix it in the
binding documentation.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>

h8300_timer8: 8bit clockevent device
h8300_timer16 / h8300_tpu: 16bit clocksource
Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>

This adds documentation of device tree bindings for the clock related
portions of the STM32 RCC block.
Signed-off-by: NDaniel Thompson <daniel.thompson@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This patch adds documentation for a pinctrl-names property.
The property, when present, is used for switching the source
of the strobe signal for the device.
Signed-off-by: NJacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Cc: Bryan Wu <cooloney@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: devicetree@vger.kernel.org
Acked-by: NSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: NBryan Wu <cooloney@gmail.com>

Instead of (partly) open coding watchdog_init_timeout to determine the
inital timeout use the core function that exists for exactly this
purpose.

As a side effect the "timeout-sec" device-tree property is recognized now
(though currently unused in the omap device trees).
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

ti,hwmods doesn't belong into the compatible section but is a property
on it's own. Also reformat the section of required properties to match the
usual style of dt binding documents.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Add a device tree binding documentation to the watchdog hardware block on the
Conexant CX92755 SoC. The CX92755 is from the Digicolor SoCs series. Other SoCs
in that series may share the same hardware block.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

On current ST platforms the LPC controls a number of functions including
Watchdog and Real Time Clock.  This patch provides the bindings used to
configure LPC in Watchdog mode.
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

On few platforms, for power efficiency, we want the device to be
configured for a specific OPP while we put the device in suspend state.

Add an optional property in operating-points-v2 bindings for that.
Suggested-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NNishanth Menon <nm@ti.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

On some platforms (Like Qualcomm's SoCs), it is not decided until
runtime on what OPPs to use. The OPP tables can be fixed at compile
time, but which table to use is found out only after reading some efuses
(sort of an prom) and knowing characteristics of the SoC.

To support such platform we need to pass multiple OPP tables per device
and hardware should be able to choose one and only one table out of
those.

Update operating-points-v2 bindings to support that.
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

Current OPP (Operating performance point) device tree bindings have been
insufficient due to the inflexible nature of the original bindings. Over
time, we have realized that Operating Performance Point definitions and
usage is varied depending on the SoC and a "single size (just frequency,
voltage) fits all" model which the original bindings attempted and
failed.

The proposed next generation of the bindings addresses by providing a
expandable binding for OPPs and introduces the following common
shortcomings seen with the original bindings:

- Getting clock/voltage/current rails sharing information between CPUs.
  Shared by all cores vs independent clock per core vs shared clock per
  cluster.

- Support for specifying current levels along with voltages.

- Support for multiple regulators.

- Support for turbo modes.

- Other per OPP settings: transition latencies, disabled status, etc.?

- Expandability of OPPs in future.

This patch introduces new bindings "operating-points-v2" to get these problems
solved. Refer to the bindings for more details.

We now have multiple versions of OPP binding and only one of them should
be used per device.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

Add device tree bindings for the DA9063 OnKey driver.
Signed-off-by: NSteve Twiss <stwiss.opensource@diasemi.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>