1. 27 8月, 2007 1 次提交
  2. 01 8月, 2007 2 次提交
  3. 18 7月, 2007 1 次提交
    • M
      sb1250-duart.c: SB1250 DUART serial support · b45d5279
      Maciej W. Rozycki 提交于
      This is a driver for the SB1250 DUART, a dual serial port implementation
      included in the Broadcom family of SOCs descending from the SiByte SB1250
      MIPS64 chip multiprocessor.  It is a new implementation replacing the
      old-fashioned driver currently present in the linux-mips.org tree.  It
      supports all the usual features one would expect from a(n asynchronous)
      serial driver, including modem line control (as far as hardware supports it
      -- there is edge detection logic missing from the DCD and RI lines and the
      driver does not implement polling of these lines at the moment), the serial
      console, BREAK transmission and reception, including the magic SysRq.  The
      receive FIFO threshold is not maintained though.
      
      The driver was tested with a SWARM board which uses a BCM1250 SOC (which is
      dual MIPS64 CMP) and has both ports of the single DUART implemented wired
      externally.  Both were tested.  Testing included using the ports as
      terminal lines at 1200bps (which is the ports minimum), 115200bps and a
      couple of random speeds inbetween.  The modem lines were verified to
      operate correctly.  No testing was performed with a use as a network
      interface, like with SLIP or PPP.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Acked-by: NRalf Baechle <ralf@linux-mips.org>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      b45d5279
  4. 30 3月, 2007 1 次提交
  5. 25 3月, 2007 1 次提交
  6. 05 3月, 2007 1 次提交
  7. 27 2月, 2007 1 次提交
  8. 07 2月, 2007 1 次提交
  9. 30 11月, 2006 3 次提交
  10. 01 11月, 2006 1 次提交
    • A
      [MIPS] Fixup migration to GENERIC_TIME · 16b7b2ac
      Atsushi Nemoto 提交于
      Since we already moved to GENERIC_TIME, we should implement alternatives
      of old do_gettimeoffset routines to get sub-jiffies resolution from
      gettimeofday().  This patch includes:
      
       * MIPS clocksource support (based on works by Manish Lachwani).
       * remove unused gettimeoffset routines and related codes.
       * remove unised 64bit do_div64_32().
       * simplify mips_hpt_init. (no argument needed, __init tag)
       * simplify c0_hpt_timer_init. (no need to write to c0_count)
       * remove some hpt_init routines.
       * mips_hpt_mask variable to specify bitmask of hpt value.
       * convert jmr3927_do_gettimeoffset to jmr3927_hpt_read.
       * convert ip27_do_gettimeoffset to ip27_hpt_read.
       * convert bcm1480_do_gettimeoffset to bcm1480_hpt_read.
       * simplify sb1250 hpt functions. (no need to subtract and shift)
      Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      16b7b2ac
  11. 12 10月, 2006 1 次提交
  12. 09 10月, 2006 1 次提交
  13. 08 10月, 2006 1 次提交
  14. 04 10月, 2006 1 次提交
  15. 27 9月, 2006 1 次提交
  16. 14 7月, 2006 3 次提交
  17. 01 7月, 2006 1 次提交
  18. 30 6月, 2006 1 次提交
    • I
      [PATCH] genirq: rename desc->handler to desc->chip · d1bef4ed
      Ingo Molnar 提交于
      This patch-queue improves the generic IRQ layer to be truly generic, by adding
      various abstractions and features to it, without impacting existing
      functionality.
      
      While the queue can be best described as "fix and improve everything in the
      generic IRQ layer that we could think of", and thus it consists of many
      smaller features and lots of cleanups, the one feature that stands out most is
      the new 'irq chip' abstraction.
      
      The irq-chip abstraction is about describing and coding and IRQ controller
      driver by mapping its raw hardware capabilities [and quirks, if needed] in a
      straightforward way, without having to think about "IRQ flow"
      (level/edge/etc.) type of details.
      
      This stands in contrast with the current 'irq-type' model of genirq
      architectures, which 'mixes' raw hardware capabilities with 'flow' details.
      The patchset supports both types of irq controller designs at once, and
      converts i386 and x86_64 to the new irq-chip design.
      
      As a bonus side-effect of the irq-chip approach, chained interrupt controllers
      (master/slave PIC constructs, etc.) are now supported by design as well.
      
      The end result of this patchset intends to be simpler architecture-level code
      and more consolidation between architectures.
      
      We reused many bits of code and many concepts from Russell King's ARM IRQ
      layer, the merging of which was one of the motivations for this patchset.
      
      This patch:
      
      rename desc->handler to desc->chip.
      
      Originally i did not want to do this, because it's a big patch.  But having
      both "desc->handler", "desc->handle_irq" and "action->handler" caused a
      large degree of confusion and made the code appear alot less clean than it
      truly is.
      
      I have also attempted a dual approach as well by introducing a
      desc->chip alias - but that just wasnt robust enough and broke
      frequently.
      
      So lets get over with this quickly.  The conversion was done automatically
      via scripts and converts all the code in the kernel.
      
      This renaming patch is the first one amongst the patches, so that the
      remaining patches can stay flexible and can be merged and split up
      without having some big monolithic patch act as a merge barrier.
      
      [akpm@osdl.org: build fix]
      [akpm@osdl.org: another build fix]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      d1bef4ed
  19. 20 6月, 2006 1 次提交
    • [
      [PATCH] Fix BCM1480 doubled process accounting times. · e1701fb2
      [MIPS] James E Wilson 提交于
      Running a UP kernel on a bcm1480 board, I get nonsensical timing
      results, like this:
      release@unknown:~/tmp$ time ./a.out
      real    0m22.906s
      user    0m45.792s
      sys     0m0.010s
      According to my watch, this program took 23 seconds to run, so the real
      time clock is OK.  It is process accounting that is broken.
      
      I tracked this down to a problem with the function
      bcm1480_timer_interrupt in the file sibyte/bcm1480/time.c.  This
      function calls ll_timer_interrupt for cpu0, and ll_local_timer_interrupt
      for all cpus.  However, both of these functions do process accounting.
      Thus processes running on cpu0 end up with doubled times.  This is very
      obvious in a UP kernel where all processes run on cpu0.
      
      The correct way to do this is to only call ll_local_timer interrupt if
      this is not cpu0.  This can be seen in the mips-board/generic/time.c
      file, and also in the sibyte/sb1250/time.c file, both of which handle
      this correctly.  I fixed the bcm1480/time.c file by copying over the
      correct code from the sb1250/time.c file.
      
      With this fix, I now get sensible results.
      release@unknown:~/tmp$ time ./a.out
      real    0m22.903s
      user    0m22.894s
      sys     0m0.006s
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e1701fb2
  20. 19 4月, 2006 1 次提交
    • R
      [MIPS] Rewrite all the assembler interrupt handlers to C. · e4ac58af
      Ralf Baechle 提交于
      Saves like 1,600 lines of code, is way easier to debug, compilers
      frequently do a better job than the cut and paste type of handlers many
      boards had.  And finally having all the stuff done in a single place
      also means alot of bug potencial for the MT ASE is gone.
      
      The only surviving handler in assembler is the DECstation one; I hope
      Maciej will rewrite it.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e4ac58af
  21. 22 2月, 2006 1 次提交
  22. 30 10月, 2005 1 次提交